Design of time delay controller based on variable reference model

Jae Bok Song, Kyeong Seok Byeon

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

Many plants have upper and lower bounds beyond which saturation of control efforts occurs. Since the saturation adversely affects control performance, it should be avoided if possible. In this paper a new approach of avoiding saturation by varying the reference model for TDC(time delay control-based systems subject to the step changes in reference inputs. In this scheme, the variable reference model is determined based on the information on control inputs and the size of the step changes in the reference inputs. This scheme is verified by application to the position control experiments using a brushless DC servo system.

Original languageEnglish
Title of host publicationProceedings of the 1998 American Control Conference, ACC 1998
Pages3339-3343
Number of pages5
DOIs
Publication statusPublished - 1998 Dec 1
Event1998 American Control Conference, ACC 1998 - Philadelphia, PA, United States
Duration: 1998 Jun 241998 Jun 26

Publication series

NameProceedings of the American Control Conference
Volume6
ISSN (Print)0743-1619

Other

Other1998 American Control Conference, ACC 1998
CountryUnited States
CityPhiladelphia, PA
Period98/6/2498/6/26

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ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Song, J. B., & Byeon, K. S. (1998). Design of time delay controller based on variable reference model. In Proceedings of the 1998 American Control Conference, ACC 1998 (pp. 3339-3343). [703193] (Proceedings of the American Control Conference; Vol. 6). https://doi.org/10.1109/ACC.1998.703193