Distance-aware L2 cache organizations for scalable multiprocessor systems

Sung Woo Jung, Hyong Shik Kim, Chu Shik Jhon

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In this paper, we suggest an LRU/distance-aware combined second-level (L2) cache for scalable CC-NUMA multiprocessors, which is composed of a traditional LRU cache and an additional cache maintaining the distance information of individual cache blocks. The LRU cache selects a victim using age information, while the distance-aware cache does this using distance information. Both work together to reduce the overall distance effectively upon cache misses by keeping long-distance blocks as well as recently used blocks. It has been observed that the proposed cache outperforms the traditional LRU cache by up to 28[%] in the execution time. It is also found to perform even better than an LRU cache of twice the size.

Original languageEnglish
Title of host publicationProceedings - Euromicro Symposium on Digital System Design, DSD 2003
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages24-32
Number of pages9
ISBN (Print)0769520030, 9780769520032
Publication statusPublished - 2003
Externally publishedYes
EventEuromicro Symposium on Digital System Design, DSD 2003 - Belek-Antalya, Turkey
Duration: 2003 Sep 12003 Sep 6

Other

OtherEuromicro Symposium on Digital System Design, DSD 2003
CountryTurkey
CityBelek-Antalya
Period03/9/103/9/6

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Jung, S. W., Kim, H. S., & Jhon, C. S. (2003). Distance-aware L2 cache organizations for scalable multiprocessor systems. In Proceedings - Euromicro Symposium on Digital System Design, DSD 2003 (pp. 24-32). Institute of Electrical and Electronics Engineers Inc..