Dynamic bit-width adaptation in DCT

An approach to trade off image quality and computation energy

Jongsun Park, Jung Hwan Choi, Kaushik Roy

Research output: Contribution to journalArticle

63 Citations (Scopus)

Abstract

This paper presents a dynamic bit-width adaptation scheme for applications using discrete cosine transform (DCT). The technique can efficiently trade off image quality and computation energy. Based on sensitivity differences of 64 DCT coefficients, separate operand bit-widths are used for different frequency components to reduce computation energy. To select the appropriate operand bit-widths that achieve significant reduction of power consumption with minimum image quality degradation, we also propose a bit-width selection algorithm. The proposed variable bit precision DCT algorithm can be efficiently implemented using carry save adder trees. The reconfigurable DCT architecture can achieve power savings ranging from 36% to 75% compared to normal operation at the expense of minor image quality degradation.

Original languageEnglish
Article number5109472
Pages (from-to)787-793
Number of pages7
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume18
Issue number5
DOIs
Publication statusPublished - 2010 May 1

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Discrete cosine transforms
Image quality
Degradation
Adders
Electric power utilization

Keywords

  • Discrete cosine transform (DCT)
  • Dynamic bit-width
  • Low power design
  • Reconfigurable architecture

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Hardware and Architecture
  • Software

Cite this

Dynamic bit-width adaptation in DCT : An approach to trade off image quality and computation energy. / Park, Jongsun; Choi, Jung Hwan; Roy, Kaushik.

In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 18, No. 5, 5109472, 01.05.2010, p. 787-793.

Research output: Contribution to journalArticle

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