Early wakeup: Improving the drowsy cache performance

Sunghoon Shim, Sung Woo Jung, Hongjun Choi, Cheol Hong Kim

Research output: Contribution to journalArticle

Abstract

As process technology scales down, leakage power consumption becomes comparable to dynamic power consumption. The drowsy cache technique is known as one of the most popular techniques for reducing the leakage power consumption in the data cache. However, the drowsy cache is reported to degrade the processor performance significantly. In this paper, to maintain the performance of the processor with the drowsy cache technique, we propose an early wakeup technique, which predicts the next cache line to be requested by utilizing the way-prediction information. The proposed technique efficiently reduces the number of accesses to the cache lines in drowsy mode. Our simulation results show that the proposed technique reduces the extra delay due to the drowsy cache scheme by 29.6%, on average.

Original languageEnglish
Pages (from-to)425-433
Number of pages9
JournalTurkish Journal of Electrical Engineering and Computer Sciences
Volume22
Issue number2
DOIs
Publication statusPublished - 2014 Feb 24

    Fingerprint

Keywords

  • Drowsy cache
  • Early wakeup
  • Low-power design, leakage power
  • Processor architecture

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Computer Science(all)

Cite this