Efficient characterization and suppression methodology of edge effects for leakage current reduction of sub-40nm DRAM device

Han Choi Soo, Hee Park Young, Hong Park Chul, Hoon Lee Sang, Hyun Yoo Moon, Tae Kim Gyu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

With the process scaling, the leakage current reduction has been the primary design concerns in a nanometer-era VLSI circuit. In this paper, we propose a new lithography process-aware edge effects correction method to reduce the leakage current in the shallow trench isolation (STI). We construct the various test structures to model Ileakage and I leakage-fringe which represent the leakage currents at the center and edge of the transistor, respectively. The layout near the active edge is modified using the look-up table generated by the calibrated analytic model. On average, the proposed edge effects correction method reduces the leakage current by 18% with the negligible decrease of the drive current at sub-40nm DRAM device.

Original languageEnglish
Title of host publication2010 International Conference on Microelectronic Test Structures, 23rd IEEE ICMTS Conference Proceedings
Pages34-37
Number of pages4
DOIs
Publication statusPublished - 2010
Event2010 International Conference on Microelectronic Test Structures, ICMTS 2010 - Hiroshima, Japan
Duration: 2010 Mar 222010 Mar 25

Publication series

NameIEEE International Conference on Microelectronic Test Structures

Other

Other2010 International Conference on Microelectronic Test Structures, ICMTS 2010
CountryJapan
CityHiroshima
Period10/3/2210/3/25

Keywords

  • Analytic model
  • Edge effects
  • Leakage current
  • Shaping gate channel

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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    Soo, H. C., Young, H. P., Chul, H. P., Sang, H. L., Moon, H. Y., & Gyu, T. K. (2010). Efficient characterization and suppression methodology of edge effects for leakage current reduction of sub-40nm DRAM device. In 2010 International Conference on Microelectronic Test Structures, 23rd IEEE ICMTS Conference Proceedings (pp. 34-37). [5466864] (IEEE International Conference on Microelectronic Test Structures). https://doi.org/10.1109/ICMTS.2010.5466864