Efficient normal basis multipliers in composite fields

Sangho Oh, Chang Han Kim, Jong In Lim, Dong Hyeon Cheon

Research output: Contribution to journalArticle

16 Citations (Scopus)

Abstract

It is well-known that a class of finite fields GF(2n) using an optimal normal basis is most suitable for a hardware implementation of arithmetic in finite fields. In this paper, we introduce composite fields of some hardware-applicable properties resulting from the normal basis representation and the optimal condition. We also present a hardware architecture of the proposed composite fields including a bit-parallel multiplier.

Original languageEnglish
Pages (from-to)1133-1138
Number of pages6
JournalIEEE Transactions on Computers
Volume49
Issue number10
DOIs
Publication statusPublished - 2000 Oct 1

Fingerprint

Normal Basis
Multiplier
Galois field
Composite
Hardware
Hardware Architecture
Composite materials
Hardware Implementation
Class

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Hardware and Architecture

Cite this

Efficient normal basis multipliers in composite fields. / Oh, Sangho; Kim, Chang Han; Lim, Jong In; Cheon, Dong Hyeon.

In: IEEE Transactions on Computers, Vol. 49, No. 10, 01.10.2000, p. 1133-1138.

Research output: Contribution to journalArticle

Oh, Sangho ; Kim, Chang Han ; Lim, Jong In ; Cheon, Dong Hyeon. / Efficient normal basis multipliers in composite fields. In: IEEE Transactions on Computers. 2000 ; Vol. 49, No. 10. pp. 1133-1138.
@article{283dc9e791714bc09e47fb75ae15db4b,
title = "Efficient normal basis multipliers in composite fields",
abstract = "It is well-known that a class of finite fields GF(2n) using an optimal normal basis is most suitable for a hardware implementation of arithmetic in finite fields. In this paper, we introduce composite fields of some hardware-applicable properties resulting from the normal basis representation and the optimal condition. We also present a hardware architecture of the proposed composite fields including a bit-parallel multiplier.",
author = "Sangho Oh and Kim, {Chang Han} and Lim, {Jong In} and Cheon, {Dong Hyeon}",
year = "2000",
month = "10",
day = "1",
doi = "10.1109/12.888054",
language = "English",
volume = "49",
pages = "1133--1138",
journal = "IEEE Transactions on Computers",
issn = "0018-9340",
publisher = "IEEE Computer Society",
number = "10",

}

TY - JOUR

T1 - Efficient normal basis multipliers in composite fields

AU - Oh, Sangho

AU - Kim, Chang Han

AU - Lim, Jong In

AU - Cheon, Dong Hyeon

PY - 2000/10/1

Y1 - 2000/10/1

N2 - It is well-known that a class of finite fields GF(2n) using an optimal normal basis is most suitable for a hardware implementation of arithmetic in finite fields. In this paper, we introduce composite fields of some hardware-applicable properties resulting from the normal basis representation and the optimal condition. We also present a hardware architecture of the proposed composite fields including a bit-parallel multiplier.

AB - It is well-known that a class of finite fields GF(2n) using an optimal normal basis is most suitable for a hardware implementation of arithmetic in finite fields. In this paper, we introduce composite fields of some hardware-applicable properties resulting from the normal basis representation and the optimal condition. We also present a hardware architecture of the proposed composite fields including a bit-parallel multiplier.

UR - http://www.scopus.com/inward/record.url?scp=0034291075&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0034291075&partnerID=8YFLogxK

U2 - 10.1109/12.888054

DO - 10.1109/12.888054

M3 - Article

AN - SCOPUS:0034291075

VL - 49

SP - 1133

EP - 1138

JO - IEEE Transactions on Computers

JF - IEEE Transactions on Computers

SN - 0018-9340

IS - 10

ER -