Efficient sequential architecture for the AES CCM mode in the 802.16e standard

Jae Deok Ji, Seok Won Jung, Eun A. Jun, Jong In Lim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)

Abstract

We propose hardware architecture of the advanced encryption standard counter with the cipher block chaining-message authentication code (AES CCM) in the 802.16e standard. It has only one AES encryption core with composite field logic for SBOX. The logic is divided into two parts to perform one round at two clock cycles. In the proposed architecture, the counter (CTR) and the cipher block chaining-message authentication code (CBC-MAC) operations are processed in a sequential mode and share one AES encryption resource at the same time. The throughput of our design is about 588Mbps at 105MHz frequency with reasonable area requirements.

Original languageEnglish
Title of host publicationICINIS 2009 - Proceedings of the 2nd International Conference on Intelligent Networks and Intelligent Systems
Pages253-256
Number of pages4
DOIs
Publication statusPublished - 2009 Dec 1
Event2nd International Conference on Intelligent Networks and Intelligent Systems, ICINIS 2009 - Tianjin, China
Duration: 2009 Nov 12009 Nov 3

Other

Other2nd International Conference on Intelligent Networks and Intelligent Systems, ICINIS 2009
CountryChina
CityTianjin
Period09/11/109/11/3

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Keywords

  • 802.16e
  • AES CCM
  • FPGA
  • SBOX composite logic

ASJC Scopus subject areas

  • Artificial Intelligence
  • Computer Networks and Communications
  • Information Systems
  • Software

Cite this

Ji, J. D., Jung, S. W., Jun, E. A., & Lim, J. I. (2009). Efficient sequential architecture for the AES CCM mode in the 802.16e standard. In ICINIS 2009 - Proceedings of the 2nd International Conference on Intelligent Networks and Intelligent Systems (pp. 253-256). [5364531] https://doi.org/10.1109/ICINIS.2009.71