Abstract
This paper presents an efficient VLSI architecture for the real-time implementation of grayscale morphological operations. The proposed architecture employs a bit-serial approach which allows grayscale morphological operations to be decomposed into bit-level binary operations by a bit-modification algorithm, and thus requires only p binary operation units for the p-bit grayscale signal. In this realization, grayscale opening and closing are accomplished by local rather than cascade operations, providing greatly increased data throughput. It is shown that this realization is simple and modular in structure and is suitable for VLSI implementation.
| Original language | English |
|---|---|
| Pages (from-to) | 359-369 |
| Number of pages | 11 |
| Journal | Proceedings of SPIE - The International Society for Optical Engineering |
| Volume | 1350 |
| Publication status | Published - 1990 |
| Externally published | Yes |
| Event | Image Algebra and Morphological Image Processing - San Diego, CA, USA Duration: 1990 Jul 10 → 1990 Jul 12 |
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Condensed Matter Physics
- Computer Science Applications
- Applied Mathematics
- Electrical and Electronic Engineering
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Cite this
Ko, S. J., & Shridhar, M. (1990). Efficient VLSI algorithm and an implementation architecture for grayscale morphology. Proceedings of SPIE - The International Society for Optical Engineering, 1350, 359-369.