In this paper, a symmetric dual-gate single-Si TFT, which is composed of three split floating n+ zones, is simulated. This structure remarkably reduces the kink-effect and improves the on-current. Due to the separated floating n+ zones, the transistor channel region is split into four zones with different lengths defined by the floating n+ region. This structure allows effective reduction in the kink-effect, depending on the length of the two sub-channels. The on-current of the proposed dual-gate structure is 0.9 mA, while that of the conventional dual-gate structure is 0.5 mA, at both 12 V drain and 7 V gate. This result demonstrates 80% enhancement in on-current. In addition, the reduction of electric field in the channel region compared to conventional single-gate TFT and the reduction in output conductance in the saturation region, is observed. In addition, the reduction of hole concentration in the channel region, in order to effectively reduce the kink-effect, is confirmed.
- Dual-gate TFT
- Symmetric dual gate
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Condensed Matter Physics
- Electrical and Electronic Engineering
- Materials Chemistry