Eliminating conditional branches for enhancing instruction level parallelism in VLIW compiler

Seong Uk Choi, Sung Soon Park, Myong Soon Park

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In VLIW (Very Long Instruction Word) compiler, one of the most important issue is how to handle conditional branches, because control dependences are caused by conditional branches and limit the scope of scheduling. This paper proposes the efficient method of eliminating conditional branches. We use SSA (Static Single Assignment) information for preserving semantics. By using our methods, global scheduling techniques can be processed more efficiently and simply. We utilized φ-functions aggressively, thus computations for code motion are not required. We don't need complex hardware support. Our scheme also makes the performance independent on the result of branch outcomes.

Original languageEnglish
Title of host publicationProceedings of the International Symposium on Parallel Architectures, Algorithms and Networks, I-SPAN
Place of PublicationLos Alamitos, CA, United States
PublisherIEEE
Pages193-199
Number of pages7
Publication statusPublished - 1996 Jan 1
EventProceedings of the 1996 2nd International Symposium on Parallel Architectures, Algorithms, and Networks, I-SPAN - Beijing, China
Duration: 1996 Jun 121996 Jun 14

Other

OtherProceedings of the 1996 2nd International Symposium on Parallel Architectures, Algorithms, and Networks, I-SPAN
CityBeijing, China
Period96/6/1296/6/14

Fingerprint

Scheduling
Semantics
Hardware

ASJC Scopus subject areas

  • Computer Science(all)

Cite this

Choi, S. U., Park, S. S., & Park, M. S. (1996). Eliminating conditional branches for enhancing instruction level parallelism in VLIW compiler. In Proceedings of the International Symposium on Parallel Architectures, Algorithms and Networks, I-SPAN (pp. 193-199). Los Alamitos, CA, United States: IEEE.

Eliminating conditional branches for enhancing instruction level parallelism in VLIW compiler. / Choi, Seong Uk; Park, Sung Soon; Park, Myong Soon.

Proceedings of the International Symposium on Parallel Architectures, Algorithms and Networks, I-SPAN. Los Alamitos, CA, United States : IEEE, 1996. p. 193-199.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Choi, SU, Park, SS & Park, MS 1996, Eliminating conditional branches for enhancing instruction level parallelism in VLIW compiler. in Proceedings of the International Symposium on Parallel Architectures, Algorithms and Networks, I-SPAN. IEEE, Los Alamitos, CA, United States, pp. 193-199, Proceedings of the 1996 2nd International Symposium on Parallel Architectures, Algorithms, and Networks, I-SPAN, Beijing, China, 96/6/12.
Choi SU, Park SS, Park MS. Eliminating conditional branches for enhancing instruction level parallelism in VLIW compiler. In Proceedings of the International Symposium on Parallel Architectures, Algorithms and Networks, I-SPAN. Los Alamitos, CA, United States: IEEE. 1996. p. 193-199
Choi, Seong Uk ; Park, Sung Soon ; Park, Myong Soon. / Eliminating conditional branches for enhancing instruction level parallelism in VLIW compiler. Proceedings of the International Symposium on Parallel Architectures, Algorithms and Networks, I-SPAN. Los Alamitos, CA, United States : IEEE, 1996. pp. 193-199
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