Embedded processor optimised for vascular pattern recognition

Gi Tae Park, Soo-Won Kim

Research output: Contribution to journalArticle

Abstract

In this study, the authors propose an efficient embedded processing architecture that uses the vascular pattern extraction (VPE) algorithm to authenticate a user to an embedded system. This study first considers the use of direction-based vascular pattern extraction (DBVPE), and analyses the computational workload involved in running software implementations on an embedded processor. The authors then present a comprehensive performance analysis of the VPE algorithm and examine in detail the various factors that contribute to processing latencies, including VPE recognition processing. In order to improve the efficiency of VPE processing in embedded devices, the authors offer details regarding the process needed to create a highly efficient application-specific processor and extend the base instruction set of the processor by using custom instructions for recognition processing. The authors implemented our proposed methodology in the context of a commercial extensible processor design flow using the Xtensa platform from Tensilica Inc. Our experiments show that our proposed methodology achieves a 3.95-fold increase in the vascular pattern recognition speed. Hence, the authors consider our technique to be efficient.

Original languageEnglish
Pages (from-to)81-92
Number of pages12
JournalIET Circuits, Devices and Systems
Volume7
Issue number2
DOIs
Publication statusPublished - 2013 Jul 31

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Pattern recognition
Processing
Embedded systems
Experiments

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Control and Systems Engineering

Cite this

Embedded processor optimised for vascular pattern recognition. / Park, Gi Tae; Kim, Soo-Won.

In: IET Circuits, Devices and Systems, Vol. 7, No. 2, 31.07.2013, p. 81-92.

Research output: Contribution to journalArticle

@article{66e2bf099cc3416999b3eadbc1fd91f1,
title = "Embedded processor optimised for vascular pattern recognition",
abstract = "In this study, the authors propose an efficient embedded processing architecture that uses the vascular pattern extraction (VPE) algorithm to authenticate a user to an embedded system. This study first considers the use of direction-based vascular pattern extraction (DBVPE), and analyses the computational workload involved in running software implementations on an embedded processor. The authors then present a comprehensive performance analysis of the VPE algorithm and examine in detail the various factors that contribute to processing latencies, including VPE recognition processing. In order to improve the efficiency of VPE processing in embedded devices, the authors offer details regarding the process needed to create a highly efficient application-specific processor and extend the base instruction set of the processor by using custom instructions for recognition processing. The authors implemented our proposed methodology in the context of a commercial extensible processor design flow using the Xtensa platform from Tensilica Inc. Our experiments show that our proposed methodology achieves a 3.95-fold increase in the vascular pattern recognition speed. Hence, the authors consider our technique to be efficient.",
author = "Park, {Gi Tae} and Soo-Won Kim",
year = "2013",
month = "7",
day = "31",
doi = "10.1049/iet-cds.2012.0192",
language = "English",
volume = "7",
pages = "81--92",
journal = "IET Circuits, Devices and Systems",
issn = "1751-858X",
publisher = "Institution of Engineering and Technology",
number = "2",

}

TY - JOUR

T1 - Embedded processor optimised for vascular pattern recognition

AU - Park, Gi Tae

AU - Kim, Soo-Won

PY - 2013/7/31

Y1 - 2013/7/31

N2 - In this study, the authors propose an efficient embedded processing architecture that uses the vascular pattern extraction (VPE) algorithm to authenticate a user to an embedded system. This study first considers the use of direction-based vascular pattern extraction (DBVPE), and analyses the computational workload involved in running software implementations on an embedded processor. The authors then present a comprehensive performance analysis of the VPE algorithm and examine in detail the various factors that contribute to processing latencies, including VPE recognition processing. In order to improve the efficiency of VPE processing in embedded devices, the authors offer details regarding the process needed to create a highly efficient application-specific processor and extend the base instruction set of the processor by using custom instructions for recognition processing. The authors implemented our proposed methodology in the context of a commercial extensible processor design flow using the Xtensa platform from Tensilica Inc. Our experiments show that our proposed methodology achieves a 3.95-fold increase in the vascular pattern recognition speed. Hence, the authors consider our technique to be efficient.

AB - In this study, the authors propose an efficient embedded processing architecture that uses the vascular pattern extraction (VPE) algorithm to authenticate a user to an embedded system. This study first considers the use of direction-based vascular pattern extraction (DBVPE), and analyses the computational workload involved in running software implementations on an embedded processor. The authors then present a comprehensive performance analysis of the VPE algorithm and examine in detail the various factors that contribute to processing latencies, including VPE recognition processing. In order to improve the efficiency of VPE processing in embedded devices, the authors offer details regarding the process needed to create a highly efficient application-specific processor and extend the base instruction set of the processor by using custom instructions for recognition processing. The authors implemented our proposed methodology in the context of a commercial extensible processor design flow using the Xtensa platform from Tensilica Inc. Our experiments show that our proposed methodology achieves a 3.95-fold increase in the vascular pattern recognition speed. Hence, the authors consider our technique to be efficient.

UR - http://www.scopus.com/inward/record.url?scp=84880665999&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84880665999&partnerID=8YFLogxK

U2 - 10.1049/iet-cds.2012.0192

DO - 10.1049/iet-cds.2012.0192

M3 - Article

AN - SCOPUS:84880665999

VL - 7

SP - 81

EP - 92

JO - IET Circuits, Devices and Systems

JF - IET Circuits, Devices and Systems

SN - 1751-858X

IS - 2

ER -