TY - GEN
T1 - Energy-effective instruction fetch unit for embedded processors
AU - Cheol, Hong Kim
AU - Hwang, Intae
AU - Chae, Changhyeon
AU - Choi, Daewon
AU - Jung, Taejin
AU - Sung, Woo Chung
PY - 2008
Y1 - 2008
N2 - For energy-aware embedded and mobile processors, this paper proposes a new energy-effective design of the instruction fetch unit that exploits the fact that the peraccess energy consumption decreases as the cache size decreases.
AB - For energy-aware embedded and mobile processors, this paper proposes a new energy-effective design of the instruction fetch unit that exploits the fact that the peraccess energy consumption decreases as the cache size decreases.
UR - http://www.scopus.com/inward/record.url?scp=51949110321&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=51949110321&partnerID=8YFLogxK
U2 - 10.1109/ccnc08.2007.168
DO - 10.1109/ccnc08.2007.168
M3 - Conference contribution
AN - SCOPUS:51949110321
SN - 1424414571
SN - 9781424414574
T3 - 2008 5th IEEE Consumer Communications and Networking Conference, CCNC 2008
SP - 734
EP - 735
BT - 2008 5th IEEE Consumer Communications and Networking Conference, CCNC 2008
T2 - 2008 5th IEEE Consumer Communications and Networking Conference, CCNC 2008
Y2 - 10 January 2008 through 12 January 2008
ER -