Energy-efficient charge-average switching DAC with floating capacitors for SAR ADC

Ju Eon Kim, Seong Jin Cho, Yong Sin Kim, Seok Lee, Kwang Hyun Baek

Research output: Contribution to journalArticle

2 Citations (Scopus)

Abstract

An energy-efficient capacitor switching digital-to-analogue converter (DAC) is proposed for successive-approximation register analogueto- digital converters (SAR ADCs). The proposed charge-average switching with floating capacitors (CASFCs) DAC disconnects the most significant bit (MSB) capacitors from the capacitor array after determining the MSB. The switching energy of the proposed CASFC DAC is lower than that of the recently published DAC, because the CAS technique is only employed in the CASFC DAC, while both the traditional and CAS methods are used in the previous DAC depending on inputs. In addition, the energy during the reset period is also minimised because the floated MSB capacitors do not consume the reset energy. The CASFC DAC reduces the switching energy with and without reset by 64.4 and 37.5%, respectively, compared with the aforementioned previous DAC.

Original languageEnglish
Pages (from-to)1131-1132
Number of pages2
JournalElectronics Letters
Volume50
Issue number16
DOIs
Publication statusPublished - 2014 Jul 31

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Digital to analog conversion
Capacitors

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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Energy-efficient charge-average switching DAC with floating capacitors for SAR ADC. / Kim, Ju Eon; Cho, Seong Jin; Kim, Yong Sin; Lee, Seok; Baek, Kwang Hyun.

In: Electronics Letters, Vol. 50, No. 16, 31.07.2014, p. 1131-1132.

Research output: Contribution to journalArticle

Kim, Ju Eon ; Cho, Seong Jin ; Kim, Yong Sin ; Lee, Seok ; Baek, Kwang Hyun. / Energy-efficient charge-average switching DAC with floating capacitors for SAR ADC. In: Electronics Letters. 2014 ; Vol. 50, No. 16. pp. 1131-1132.
@article{9b39ee884af941eab4c1ed66389b52e1,
title = "Energy-efficient charge-average switching DAC with floating capacitors for SAR ADC",
abstract = "An energy-efficient capacitor switching digital-to-analogue converter (DAC) is proposed for successive-approximation register analogueto- digital converters (SAR ADCs). The proposed charge-average switching with floating capacitors (CASFCs) DAC disconnects the most significant bit (MSB) capacitors from the capacitor array after determining the MSB. The switching energy of the proposed CASFC DAC is lower than that of the recently published DAC, because the CAS technique is only employed in the CASFC DAC, while both the traditional and CAS methods are used in the previous DAC depending on inputs. In addition, the energy during the reset period is also minimised because the floated MSB capacitors do not consume the reset energy. The CASFC DAC reduces the switching energy with and without reset by 64.4 and 37.5{\%}, respectively, compared with the aforementioned previous DAC.",
author = "Kim, {Ju Eon} and Cho, {Seong Jin} and Kim, {Yong Sin} and Seok Lee and Baek, {Kwang Hyun}",
year = "2014",
month = "7",
day = "31",
doi = "10.1049/el.2014.1792",
language = "English",
volume = "50",
pages = "1131--1132",
journal = "Electronics Letters",
issn = "0013-5194",
publisher = "Institution of Engineering and Technology",
number = "16",

}

TY - JOUR

T1 - Energy-efficient charge-average switching DAC with floating capacitors for SAR ADC

AU - Kim, Ju Eon

AU - Cho, Seong Jin

AU - Kim, Yong Sin

AU - Lee, Seok

AU - Baek, Kwang Hyun

PY - 2014/7/31

Y1 - 2014/7/31

N2 - An energy-efficient capacitor switching digital-to-analogue converter (DAC) is proposed for successive-approximation register analogueto- digital converters (SAR ADCs). The proposed charge-average switching with floating capacitors (CASFCs) DAC disconnects the most significant bit (MSB) capacitors from the capacitor array after determining the MSB. The switching energy of the proposed CASFC DAC is lower than that of the recently published DAC, because the CAS technique is only employed in the CASFC DAC, while both the traditional and CAS methods are used in the previous DAC depending on inputs. In addition, the energy during the reset period is also minimised because the floated MSB capacitors do not consume the reset energy. The CASFC DAC reduces the switching energy with and without reset by 64.4 and 37.5%, respectively, compared with the aforementioned previous DAC.

AB - An energy-efficient capacitor switching digital-to-analogue converter (DAC) is proposed for successive-approximation register analogueto- digital converters (SAR ADCs). The proposed charge-average switching with floating capacitors (CASFCs) DAC disconnects the most significant bit (MSB) capacitors from the capacitor array after determining the MSB. The switching energy of the proposed CASFC DAC is lower than that of the recently published DAC, because the CAS technique is only employed in the CASFC DAC, while both the traditional and CAS methods are used in the previous DAC depending on inputs. In addition, the energy during the reset period is also minimised because the floated MSB capacitors do not consume the reset energy. The CASFC DAC reduces the switching energy with and without reset by 64.4 and 37.5%, respectively, compared with the aforementioned previous DAC.

UR - http://www.scopus.com/inward/record.url?scp=84905225435&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84905225435&partnerID=8YFLogxK

U2 - 10.1049/el.2014.1792

DO - 10.1049/el.2014.1792

M3 - Article

VL - 50

SP - 1131

EP - 1132

JO - Electronics Letters

JF - Electronics Letters

SN - 0013-5194

IS - 16

ER -