ESD protection circuit with separated GGNMOS segment for input protection

Sang Joon Hwang, Chang Hun Lee, Min Chul Jung, Man Young Sung

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

An ESD protection circuit in chip level protection is proposed as the electrostatic discharge (ESD) clamping circuit such as thick field oxide (TFO), grounded gate MOS (GGNMOS) and separated segment for input protection. The ESD protection circuit for input protection was implemented from the proposed ESD protection circuit. The GGNMOS applied to separated segment has been simulated by DESSIS of TCAD for thermal characteristic with human body model (HBM) pulse and realized the protection circuit for input protection has been simulated by HSPICE.

Original languageEnglish
Title of host publication2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC
Pages511-514
Number of pages4
DOIs
Publication statusPublished - 2006 Dec 1
Event2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC - Howloon, Hong Kong
Duration: 2005 Dec 192005 Dec 21

Other

Other2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC
CountryHong Kong
CityHowloon
Period05/12/1905/12/21

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ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

Cite this

Hwang, S. J., Lee, C. H., Jung, M. C., & Sung, M. Y. (2006). ESD protection circuit with separated GGNMOS segment for input protection. In 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC (pp. 511-514). [1635320] https://doi.org/10.1109/EDSSC.2005.1635320