Abstract
Array data flow analysis is known to be crucial to the success of array privatization, one of the most important techniques for program parallelization. It is clear that array data flow analysis should be performed interprocedurally and symbolically, and that it often needs to handle the predicates represented by IF conditions. Unfortunately, such a powerful program analysis can be extremely time-consuming if not carefully designed. How to enhance the efficiency of this analysis to a practical level remains an issue largely untouched to date. This paper documents our experience with building a highly efficient array data flow analyzer which is based on guarded array regions and which runs faster, by one or two orders of magnitude, than other similarly powerful tools.
Original language | English |
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Pages | 157-167 |
Number of pages | 11 |
DOIs | |
Publication status | Published - 1997 |
Event | Proceedings of the 1997 6th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming - Las Vegas, NV, USA Duration: 1997 Jun 18 → 1997 Jun 21 |
Other
Other | Proceedings of the 1997 6th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming |
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City | Las Vegas, NV, USA |
Period | 97/6/18 → 97/6/21 |
ASJC Scopus subject areas
- Software