Exploiting parallelism in memory operations for code optimization

Yunheung Paek, Junsik Choi, Jinoo Joung, Junseo Lee, Seon Wook Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

Code size reduction is ever becoming more important for compilers targeting embedded processors because these processors are often severely limited by storage constraints and thus the reduced code size can have a positively significant impact on their performance. Various code size reduction techniques have different motivations and a variety of application contexts utilizing special hardware features of their target processors. In this work, we propose a novel technique that fully utilizes a set of hardware instructions, called the multiple load/store (MLS) or parallel load/store (PLS), that are specially featured for reducing code size by minimizing the number of memory operations in the code. To take advantage of this feature, many microprocessors support the MLS instructions, whereas no existing compilers fully exploit the potential benefit of these instructions but only use them for some limited cases. This is mainly because optimizing memory accesses with MLS instructions for general cases is an NP-hard problem that necessitates complex assignments of registers and memory offsets for variables in a stack frame. Our technique uses a couple of heuristics to efficiently handle this problem in a polynomial time bound.

Original languageEnglish
Title of host publicationLecture Notes in Computer Science
EditorsR. Eigenmann, Z. Li, S.P. Midkiff
Pages132-148
Number of pages17
Volume3602
Publication statusPublished - 2005
Event17th International Workshop on Languages and Compilers for High Performance Computing, LCPC 2004 - West Lafayette, IN, United States
Duration: 2004 Sep 222004 Sep 24

Other

Other17th International Workshop on Languages and Compilers for High Performance Computing, LCPC 2004
CountryUnited States
CityWest Lafayette, IN
Period04/9/2204/9/24

Fingerprint

Data storage equipment
Hardware
Microprocessor chips
Computational complexity
Polynomials

ASJC Scopus subject areas

  • Computer Science (miscellaneous)

Cite this

Paek, Y., Choi, J., Joung, J., Lee, J., & Kim, S. W. (2005). Exploiting parallelism in memory operations for code optimization. In R. Eigenmann, Z. Li, & S. P. Midkiff (Eds.), Lecture Notes in Computer Science (Vol. 3602, pp. 132-148)

Exploiting parallelism in memory operations for code optimization. / Paek, Yunheung; Choi, Junsik; Joung, Jinoo; Lee, Junseo; Kim, Seon Wook.

Lecture Notes in Computer Science. ed. / R. Eigenmann; Z. Li; S.P. Midkiff. Vol. 3602 2005. p. 132-148.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Paek, Y, Choi, J, Joung, J, Lee, J & Kim, SW 2005, Exploiting parallelism in memory operations for code optimization. in R Eigenmann, Z Li & SP Midkiff (eds), Lecture Notes in Computer Science. vol. 3602, pp. 132-148, 17th International Workshop on Languages and Compilers for High Performance Computing, LCPC 2004, West Lafayette, IN, United States, 04/9/22.
Paek Y, Choi J, Joung J, Lee J, Kim SW. Exploiting parallelism in memory operations for code optimization. In Eigenmann R, Li Z, Midkiff SP, editors, Lecture Notes in Computer Science. Vol. 3602. 2005. p. 132-148
Paek, Yunheung ; Choi, Junsik ; Joung, Jinoo ; Lee, Junseo ; Kim, Seon Wook. / Exploiting parallelism in memory operations for code optimization. Lecture Notes in Computer Science. editor / R. Eigenmann ; Z. Li ; S.P. Midkiff. Vol. 3602 2005. pp. 132-148
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