We have developed a fast programmable trigger processor board based on a field programmable gate array and a complex programmable logic device for use in the BELLE experiment. The trigger board accommodates 144 ECL input signals, 2 NIM input signals, 24 ECL output signals, and the VME bus specification. An asynchronous trigger logic for counting isolated clusters is used. We have obtained a trigger latency of 50 ns with full access to input and output signals via a VME interface. The trigger logic can be modified at any time depending on the experimental conditions.
|Number of pages||6|
|Journal||Nuclear Instruments and Methods in Physics Research, Section A: Accelerators, Spectrometers, Detectors and Associated Equipment|
|Publication status||Published - 2001 Jan 21|
ASJC Scopus subject areas
- Nuclear and High Energy Physics