Abstract
FBD (Function Block Diagram) is one of the widely used PLC (Programmable Logic Controller) programming languages in plant automation industry. Many vendors and products have their own forms and formats, which are not compatible with others. Formal verification techniques and tools for FBDs should have provided vendor- and product-specific versions. PLCopen, a vendor/product independent worldwide association, provides a standardized way to define FBDs in an XML format. This paper proposes a CASE tool, FBDtoVerilog, which translates the PLCopen-FBDs into Verilog programs. Verilog is an input programming language for formal verification tools such as VIS (Verification with Interaction and Synthesis). It had been efficiently used as an input front-end of formal verifications, when developing software controllers of nuclear power plants in Korea. We demonstrate its usefulness and effectiveness with a prototype version of FBDs which had developed for APR-1400 nuclear power reactor in Korea.
| Original language | English |
|---|---|
| Title of host publication | SEKE 2011 - Proceedings of the 23rd International Conference on Software Engineering and Knowledge Engineering |
| Pages | 48-51 |
| Number of pages | 4 |
| Publication status | Published - 2011 Dec 1 |
| Event | SEKE 2011 - Proceedings of the 23rd International Conference on Software Engineering and Knowledge Engineering - Miami, FL, United States Duration: 2011 Jul 7 → 2011 Jul 9 |
Other
| Other | SEKE 2011 - Proceedings of the 23rd International Conference on Software Engineering and Knowledge Engineering |
|---|---|
| Country | United States |
| City | Miami, FL |
| Period | 11/7/7 → 11/7/9 |
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Keywords
- CASE
- FBD
- PLCopen
- Translation
- Verilog
ASJC Scopus subject areas
- Software
Cite this
FBDtoVerilog : A vendor-independent translation from FBDs into Verilog programs. / Yoo, Junbeom; Lee, Jong Hoon; Jeong, Sehun; Cha, Sungdeok.
SEKE 2011 - Proceedings of the 23rd International Conference on Software Engineering and Knowledge Engineering. 2011. p. 48-51.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
}
TY - GEN
T1 - FBDtoVerilog
T2 - A vendor-independent translation from FBDs into Verilog programs
AU - Yoo, Junbeom
AU - Lee, Jong Hoon
AU - Jeong, Sehun
AU - Cha, Sungdeok
PY - 2011/12/1
Y1 - 2011/12/1
N2 - FBD (Function Block Diagram) is one of the widely used PLC (Programmable Logic Controller) programming languages in plant automation industry. Many vendors and products have their own forms and formats, which are not compatible with others. Formal verification techniques and tools for FBDs should have provided vendor- and product-specific versions. PLCopen, a vendor/product independent worldwide association, provides a standardized way to define FBDs in an XML format. This paper proposes a CASE tool, FBDtoVerilog, which translates the PLCopen-FBDs into Verilog programs. Verilog is an input programming language for formal verification tools such as VIS (Verification with Interaction and Synthesis). It had been efficiently used as an input front-end of formal verifications, when developing software controllers of nuclear power plants in Korea. We demonstrate its usefulness and effectiveness with a prototype version of FBDs which had developed for APR-1400 nuclear power reactor in Korea.
AB - FBD (Function Block Diagram) is one of the widely used PLC (Programmable Logic Controller) programming languages in plant automation industry. Many vendors and products have their own forms and formats, which are not compatible with others. Formal verification techniques and tools for FBDs should have provided vendor- and product-specific versions. PLCopen, a vendor/product independent worldwide association, provides a standardized way to define FBDs in an XML format. This paper proposes a CASE tool, FBDtoVerilog, which translates the PLCopen-FBDs into Verilog programs. Verilog is an input programming language for formal verification tools such as VIS (Verification with Interaction and Synthesis). It had been efficiently used as an input front-end of formal verifications, when developing software controllers of nuclear power plants in Korea. We demonstrate its usefulness and effectiveness with a prototype version of FBDs which had developed for APR-1400 nuclear power reactor in Korea.
KW - CASE
KW - FBD
KW - PLCopen
KW - Translation
KW - Verilog
UR - http://www.scopus.com/inward/record.url?scp=84862916701&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84862916701&partnerID=8YFLogxK
M3 - Conference contribution
AN - SCOPUS:84862916701
SN - 1891706292
SN - 9781891706295
SP - 48
EP - 51
BT - SEKE 2011 - Proceedings of the 23rd International Conference on Software Engineering and Knowledge Engineering
ER -