@article{3c0b717afee34e0787cdb5ba1a272e88,
title = "Fermi Level Depinning in Ti/GeO2/n-Ge via the Interfacial Reaction Between Ti and GeO2",
abstract = "A new method of forming an ohmic contact without an increase in parasitic resistance is proposed in the Ti/GeO2/Ge substrate. Fermi-level depinning in Ti/GeO2/n-Ge contacts is possible with the formation of an interfacial TiOx layer in the contacts via an interfacial reaction. Unlike the intentional deposition of a metal oxide on a Ge substrate, this method provides easy process integration to lessen Fermi-level pinning in n-type Ge substrates.",
keywords = "Fermi-level pinning (FLP), Germanium, Schottky barrier height (SBH), Titanium oxide",
author = "Yujin Seo and Lee, {Tae In} and Ahn, {Hyun Jun} and Jungmin Moon and Hwang, {Wan Sik} and Yu, {Hyun Yong} and Cho, {Byung Jin}",
note = "Funding Information: Manuscript received July 5, 2017; accepted August 2, 2017. Date of publication August 14, 2017; date of current version September 20, 2017. This work was supported by the Industrial Strategic Technology Development Program (Technology Development of Ge nMOS/pMOS FinFET for 10nm Technology Node) funded by the Ministry of Trade, Industry and Energy (MI, Korea) under Grant 10048594. The review of this paper was arranged by Editor H. Wong. (Corresponding author: Byung Jin Cho.) Y. Seo, T. I. Lee, H. J. Ahn, J. Moon, and B. J. Cho are with the School of Electrical Engineering, KAIST, Daejeon 305-701, South Korea (e-mail: bjcho@kaist.edu). Publisher Copyright: {\textcopyright} 1963-2012 IEEE.",
year = "2017",
month = oct,
doi = "10.1109/TED.2017.2736163",
language = "English",
volume = "64",
pages = "4242--4245",
journal = "IEEE Transactions on Electron Devices",
issn = "0018-9383",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "10",
}