Abstract
We present a capacitor-less 1T-DRAM cell on SiO$-2$ /Si substrates using a silicon nanowire (SiNW) as the channel material. The SiNWs are fabricated by a top-down route that is fully compatible with the current Si-based CMOS technology. Based on the observation of the floating body effect of a partially depleted (PD) silicon nanowire transistor (SNWT), its 1T-DRAM functionality and reliability characteristics are investigated. By virtue of the top-down route providing a printable form of the inverted triangular SiNWs, the PD SNWT 1T-DRAM cell can be applied on insulating plastic substrates for potential applications of flexible electronics.
| Original language | English |
|---|---|
| Article number | 6082450 |
| Pages (from-to) | 355-359 |
| Number of pages | 5 |
| Journal | IEEE Transactions on Nanotechnology |
| Volume | 11 |
| Issue number | 2 |
| DOIs | |
| Publication status | Published - 2012 Mar 1 |
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Keywords
- 1T-DRAM
- Capacitor-less
- floating body effect
- partially depleted (PD)
- silicon nanowire transistor (SNWT)
ASJC Scopus subject areas
- Electrical and Electronic Engineering
- Computer Science Applications
Cite this
Floating body effect in partially depleted silicon nanowire transistors and potential capacitor-less one-transistor DRAM applications. / Lee, Myeongwon; Moon, Taeho; Kim, Sangsig.
In: IEEE Transactions on Nanotechnology, Vol. 11, No. 2, 6082450, 01.03.2012, p. 355-359.Research output: Contribution to journal › Article
}
TY - JOUR
T1 - Floating body effect in partially depleted silicon nanowire transistors and potential capacitor-less one-transistor DRAM applications
AU - Lee, Myeongwon
AU - Moon, Taeho
AU - Kim, Sangsig
PY - 2012/3/1
Y1 - 2012/3/1
N2 - We present a capacitor-less 1T-DRAM cell on SiO$-2$ /Si substrates using a silicon nanowire (SiNW) as the channel material. The SiNWs are fabricated by a top-down route that is fully compatible with the current Si-based CMOS technology. Based on the observation of the floating body effect of a partially depleted (PD) silicon nanowire transistor (SNWT), its 1T-DRAM functionality and reliability characteristics are investigated. By virtue of the top-down route providing a printable form of the inverted triangular SiNWs, the PD SNWT 1T-DRAM cell can be applied on insulating plastic substrates for potential applications of flexible electronics.
AB - We present a capacitor-less 1T-DRAM cell on SiO$-2$ /Si substrates using a silicon nanowire (SiNW) as the channel material. The SiNWs are fabricated by a top-down route that is fully compatible with the current Si-based CMOS technology. Based on the observation of the floating body effect of a partially depleted (PD) silicon nanowire transistor (SNWT), its 1T-DRAM functionality and reliability characteristics are investigated. By virtue of the top-down route providing a printable form of the inverted triangular SiNWs, the PD SNWT 1T-DRAM cell can be applied on insulating plastic substrates for potential applications of flexible electronics.
KW - 1T-DRAM
KW - Capacitor-less
KW - floating body effect
KW - partially depleted (PD)
KW - silicon nanowire transistor (SNWT)
UR - http://www.scopus.com/inward/record.url?scp=84863346066&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84863346066&partnerID=8YFLogxK
U2 - 10.1109/TNANO.2011.2175942
DO - 10.1109/TNANO.2011.2175942
M3 - Article
AN - SCOPUS:84863346066
VL - 11
SP - 355
EP - 359
JO - IEEE Transactions on Nanotechnology
JF - IEEE Transactions on Nanotechnology
SN - 1536-125X
IS - 2
M1 - 6082450
ER -