Abstract
A folding Viterbi detector (FVD) is proposed, which has the usual state transition diagram folded with inverted states. Since most trellis-coded signals have symmetrical transition diagrams, if folded appropriately, branch metrics will appear when an add or subtract operation is carried out. In this scheme, one adder/subtractor replaces two adders. Compared with the EPR4 GVA detector, which requires eight adders, the proposed FVD requires only five adder/subtractors and the total gate count is reduced by 38% without BER performance degradation.
Original language | English |
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Pages (from-to) | 330-331 |
Number of pages | 2 |
Journal | Electronics Letters |
Volume | 36 |
Issue number | 4 |
DOIs | |
Publication status | Published - 2000 Feb 17 |
ASJC Scopus subject areas
- Electrical and Electronic Engineering