FPGA reverse engineering in Vivado design suite based on X-ray project

Hoyoung Yu, Hyung Min Lee, Youngjoo Shin, Youngmin Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

As FPGA demand grows, interest in FPGA security is also increasing. FPGA Reverse Engineering (RE) in the ISE Design Suite environment has been studied extensively, but FPGA RE in the Vivado Design Suite environment has not been practically studied at present. Particularly, there is no research on Programmable Interconnect Points (PIP). Since a method that correlates bitstream and XDL file is not applicable in Vivado environment, it requires complete analysis of FPGA structure and bitstream. So X-ray project [1] is used for structure analysis. In this paper, we analyze PIP bitstream configuration information based on X-ray project and propose PIP RE method in Vivado Design Suite environment based on it. The proposed method can be extended to full FPGA RE in Vivado Design Suite environment through further studies.

Original languageEnglish
Title of host publicationProceedings - 2019 International SoC Design Conference, ISOCC 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages239-240
Number of pages2
ISBN (Electronic)9781728124780
DOIs
Publication statusPublished - 2019 Oct 1
Event16th International System-on-Chip Design Conference, ISOCC 2019 - Jeju, Korea, Republic of
Duration: 2019 Oct 62019 Oct 9

Publication series

NameProceedings - 2019 International SoC Design Conference, ISOCC 2019
Volume2019-January

Conference

Conference16th International System-on-Chip Design Conference, ISOCC 2019
Country/TerritoryKorea, Republic of
CityJeju
Period19/10/619/10/9

Keywords

  • FPGA
  • Non-invasive attack
  • Reverse engineering

ASJC Scopus subject areas

  • Signal Processing
  • Electrical and Electronic Engineering
  • Instrumentation
  • Artificial Intelligence
  • Hardware and Architecture

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