Full adder-based inner product step processors for residue and quadratic residue number systems

Seon Wook Kim, Thanos Stouraitis, Alexander Skavantzos

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Most implementations of an accumulator, a multiplier, or an accumulator-multiplier unit for residue and quadratic residue number systems are based on ROMs or PLAs. Also the architectures which perform both addition and multiplication simultaneously have been rarely reported. This paper proposes an full adder-based arithmetic unit of a modulus m, called an FA-based AUm, which performs both addition and multiplication at the same time. Since the proposed AUmS use full adders as their basic units, they lead to modular and regular designs which result in lower cost and easier implementation in VLSI.

Original languageEnglish
Title of host publicationProceedings - IEEE International Symposium on Circuits and Systems
Place of PublicationPiscataway, NJ, United States
PublisherPubl by IEEE
Pages1821-1829
Number of pages9
Volume3
ISBN (Print)0780312813
Publication statusPublished - 1993 Jan 1
Externally publishedYes
EventProceedings of the 1993 IEEE International Symposium on Circuits and Systems - Chicago, IL, USA
Duration: 1993 May 31993 May 6

Other

OtherProceedings of the 1993 IEEE International Symposium on Circuits and Systems
CityChicago, IL, USA
Period93/5/393/5/6

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ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

Cite this

Kim, S. W., Stouraitis, T., & Skavantzos, A. (1993). Full adder-based inner product step processors for residue and quadratic residue number systems. In Proceedings - IEEE International Symposium on Circuits and Systems (Vol. 3, pp. 1821-1829). Publ by IEEE.