Full integration and cell characteristics for 64Mb nonvolatile PRAM

S. H. Lee, Y. N. Hwang, S. Y. Lee, K. C. Ryoo, S. J. Ahn, Hyun Cheol Koo, C. W. Jeong, Y. T. Kim, G. H. Koh, G. T. Jeong, H. S. Jeong, Kinam Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

30 Citations (Scopus)

Abstract

We have integrated a 64Mb nonvolatile random access memory using phase transition phenomena. Based on 0.18um-CMOS technologies, the vertical contact typed memory cell is fabricated. The device density can be sharply increased with decreasing the writing current and the GST size. But, for reduction of writing current, issues including set and interface resistances should be stabilized. Additionally, our results also show the feasibility of 256Mb nonvolatile PRAM with writing time below 100ns.

Original languageEnglish
Title of host publicationDigest of Technical Papers - Symposium on VLSI Technology
Pages20-21
Number of pages2
Publication statusPublished - 2004
Externally publishedYes
Event2004 Symposium on VLSI Technology - Digest of Technical Papers - Honolulu, HI, United States
Duration: 2004 Jun 152004 Jun 17

Other

Other2004 Symposium on VLSI Technology - Digest of Technical Papers
CountryUnited States
CityHonolulu, HI
Period04/6/1504/6/17

Keywords

  • Cell characteristics
  • High density
  • PRAM

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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  • Cite this

    Lee, S. H., Hwang, Y. N., Lee, S. Y., Ryoo, K. C., Ahn, S. J., Koo, H. C., Jeong, C. W., Kim, Y. T., Koh, G. H., Jeong, G. T., Jeong, H. S., & Kim, K. (2004). Full integration and cell characteristics for 64Mb nonvolatile PRAM. In Digest of Technical Papers - Symposium on VLSI Technology (pp. 20-21)