Full integration and cell characteristics for 64Mb nonvolatile PRAM

S. H. Lee; Y. N. Hwang; S. Y. Lee; K. C. Ryoo; S. J. Ahn; H. C. Koo; C. W. Jeong; Y. T. Kim; G. H. Koh; G. T. Jeong; H. S. Jeong; Kinam Kim

doi:10.1109/vlsit.2004.1345369

Full integration and cell characteristics for 64Mb nonvolatile PRAM

S. H. Lee, Y. N. Hwang, S. Y. Lee, K. C. Ryoo, S. J. Ahn, H. C. Koo, C. W. Jeong, Y. T. Kim, G. H. Koh, G. T. Jeong, H. S. Jeong, Kinam Kim

KU-KIST Graduate School of Converging Science and Technology

Research output: Contribution to journal › Conference article › peer-review

33 Citations (Scopus)

Abstract

We have integrated a 64Mb nonvolatile random access memory using phase transition phenomena. Based on 0.18um-CMOS technologies, the vertical contact typed memory cell is fabricated. The device density can be sharply increased with decreasing the writing current and the GST size. But, for reduction of writing current, issues including set and interface resistances should be stabilized. Additionally, our results also show the feasibility of 256Mb nonvolatile PRAM with writing time below 100ns.

Original language	English
Pages (from-to)	20-21
Number of pages	2
Journal	Digest of Technical Papers - Symposium on VLSI Technology
DOIs	https://doi.org/10.1109/vlsit.2004.1345369
Publication status	Published - 2004
Event	2004 Symposium on VLSI Technology - Digest of Technical Papers - Honolulu, HI, United States Duration: 2004 Jun 15 → 2004 Jun 17

Keywords

Cell characteristics
High density
PRAM

ASJC Scopus subject areas

Electrical and Electronic Engineering

Access to Document

10.1109/vlsit.2004.1345369

Cite this

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title = "Full integration and cell characteristics for 64Mb nonvolatile PRAM",

abstract = "We have integrated a 64Mb nonvolatile random access memory using phase transition phenomena. Based on 0.18um-CMOS technologies, the vertical contact typed memory cell is fabricated. The device density can be sharply increased with decreasing the writing current and the GST size. But, for reduction of writing current, issues including set and interface resistances should be stabilized. Additionally, our results also show the feasibility of 256Mb nonvolatile PRAM with writing time below 100ns.",

keywords = "Cell characteristics, High density, PRAM",

author = "Lee, {S. H.} and Hwang, {Y. N.} and Lee, {S. Y.} and Ryoo, {K. C.} and Ahn, {S. J.} and Koo, {H. C.} and Jeong, {C. W.} and Kim, {Y. T.} and Koh, {G. H.} and Jeong, {G. T.} and Jeong, {H. S.} and Kinam Kim",

year = "2004",

doi = "10.1109/vlsit.2004.1345369",

language = "English",

pages = "20--21",

journal = "Digest of Technical Papers - Symposium on VLSI Technology",

issn = "0743-1562",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

}

TY - JOUR

T1 - Full integration and cell characteristics for 64Mb nonvolatile PRAM

AU - Lee, S. H.

AU - Hwang, Y. N.

AU - Lee, S. Y.

AU - Ryoo, K. C.

AU - Ahn, S. J.

AU - Koo, H. C.

AU - Jeong, C. W.

AU - Kim, Y. T.

AU - Koh, G. H.

AU - Jeong, G. T.

AU - Jeong, H. S.

AU - Kim, Kinam

PY - 2004

Y1 - 2004

N2 - We have integrated a 64Mb nonvolatile random access memory using phase transition phenomena. Based on 0.18um-CMOS technologies, the vertical contact typed memory cell is fabricated. The device density can be sharply increased with decreasing the writing current and the GST size. But, for reduction of writing current, issues including set and interface resistances should be stabilized. Additionally, our results also show the feasibility of 256Mb nonvolatile PRAM with writing time below 100ns.

AB - We have integrated a 64Mb nonvolatile random access memory using phase transition phenomena. Based on 0.18um-CMOS technologies, the vertical contact typed memory cell is fabricated. The device density can be sharply increased with decreasing the writing current and the GST size. But, for reduction of writing current, issues including set and interface resistances should be stabilized. Additionally, our results also show the feasibility of 256Mb nonvolatile PRAM with writing time below 100ns.

KW - Cell characteristics

KW - High density

KW - PRAM

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UR - http://www.scopus.com/inward/citedby.url?scp=4544367628&partnerID=8YFLogxK

U2 - 10.1109/vlsit.2004.1345369

DO - 10.1109/vlsit.2004.1345369

M3 - Conference article

AN - SCOPUS:4544367628

SN - 0743-1562

SP - 20

EP - 21

JO - Digest of Technical Papers - Symposium on VLSI Technology

JF - Digest of Technical Papers - Symposium on VLSI Technology

T2 - 2004 Symposium on VLSI Technology - Digest of Technical Papers

Y2 - 15 June 2004 through 17 June 2004

ER -

Full integration and cell characteristics for 64Mb nonvolatile PRAM

Abstract

Keywords

ASJC Scopus subject areas

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