Fully ion-implanted InP JFET with buried p-layer

Sung J. Kim, Jichai Jeong, G. P. Vella-Coleiro, P. R. Smith

Research output: Contribution to journalArticle

11 Citations (Scopus)

Abstract

Implementation of a buried p-layer in a fully ion implanted InP JFET is discussed. Using Be coimplanted with Si, a sharp channel profile is obtained. The saturation current has been reduced, and the pinch-off characteristic has been improved, with a slight decrease in transconductance and cutoff frequency. The equivalent circuits for the JFET with and without the buried p-layer are compared.

Original languageEnglish
Pages (from-to)57-58
Number of pages2
JournalElectron device letters
Volume11
Issue number1
Publication statusPublished - 1990 Jan 1
Externally publishedYes

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Junction gate field effect transistors
Ions
Cutoff frequency
Transconductance
Equivalent circuits

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Kim, S. J., Jeong, J., Vella-Coleiro, G. P., & Smith, P. R. (1990). Fully ion-implanted InP JFET with buried p-layer. Electron device letters, 11(1), 57-58.

Fully ion-implanted InP JFET with buried p-layer. / Kim, Sung J.; Jeong, Jichai; Vella-Coleiro, G. P.; Smith, P. R.

In: Electron device letters, Vol. 11, No. 1, 01.01.1990, p. 57-58.

Research output: Contribution to journalArticle

Kim, SJ, Jeong, J, Vella-Coleiro, GP & Smith, PR 1990, 'Fully ion-implanted InP JFET with buried p-layer', Electron device letters, vol. 11, no. 1, pp. 57-58.
Kim SJ, Jeong J, Vella-Coleiro GP, Smith PR. Fully ion-implanted InP JFET with buried p-layer. Electron device letters. 1990 Jan 1;11(1):57-58.
Kim, Sung J. ; Jeong, Jichai ; Vella-Coleiro, G. P. ; Smith, P. R. / Fully ion-implanted InP JFET with buried p-layer. In: Electron device letters. 1990 ; Vol. 11, No. 1. pp. 57-58.
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