Fully Ion-Implanted InP JFET with Buried p-Layer

Sung J. Kim; Jichai Jeong; G. P. Vella-Coleiro; P. R. Smith

doi:10.1109/55.46930

Fully Ion-Implanted InP JFET with Buried p-Layer

Sung J. Kim, Jichai Jeong, G. P. Vella-Coleiro, P. R. Smith

Department of Brain and Cognitive Engineering

Research output: Contribution to journal › Article

11 Citations (Scopus)

Abstract

A buried p-layer has been successfully implemented in a fully ion implanted InP JFET for the first time. Using Be co-implanted with Si, a sharp channel profile is obtained. The saturation current has been reduced and the pinch-off characteristic has been improved with a slight decrease in transconductance and cutoff frequency. The equivalent circuits for the JFET with and without the buried p-layer are compared.

Original language	English
Pages (from-to)	57-58
Number of pages	2
Journal	IEEE Electron Device Letters
Volume	11
Issue number	1
DOIs	https://doi.org/10.1109/55.46930
Publication status	Published - 1990 Jan

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

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Kim, S. J., Jeong, J., Vella-Coleiro, G. P., & Smith, P. R. (1990). Fully Ion-Implanted InP JFET with Buried p-Layer. IEEE Electron Device Letters, 11(1), 57-58. https://doi.org/10.1109/55.46930

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