Gate all around metal oxide field transistor: Surface potential calculation method including doping and interface trap charge and the effect of interface trap charge on subthreshold slope

Faraz Najam, Sangsig Kim, Yun Seop Yu

Research output: Contribution to journalArticle

6 Citations (Scopus)

Abstract

An explicit surface potential calculation method of gate-all-around MOSFET (GAAMOSFET) devices which takes into account both interface trap charge and varying doping levels is presented. The results of the method are extensively verified by numerical simulation. Results from the model are used to find qualitative and quantitative effect of interface trap charge on subthreshold slope (SS) of GAAMOSFET devices. Further, design constraints of GAAMOSFET devices with emphasis on the effect of interface trap charge on device SS performance are investigated.

Original languageEnglish
Pages (from-to)530-537
Number of pages8
JournalJournal of Semiconductor Technology and Science
Volume13
Issue number5
DOIs
Publication statusPublished - 2013 Oct 1

Fingerprint

Surface potential
MOSFET devices
Oxides
Transistors
Metals
Doping (additives)
Computer simulation

Keywords

  • Compact model
  • Drain-source current
  • Gate-all-around metal-oxide-semiconductor-field-effect-transistor (GAAMOSFET)
  • Interface trap distribution
  • Scaling theory

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

Cite this

@article{60f8c8228a564ce1a9eb2a3d4628b0b2,
title = "Gate all around metal oxide field transistor: Surface potential calculation method including doping and interface trap charge and the effect of interface trap charge on subthreshold slope",
abstract = "An explicit surface potential calculation method of gate-all-around MOSFET (GAAMOSFET) devices which takes into account both interface trap charge and varying doping levels is presented. The results of the method are extensively verified by numerical simulation. Results from the model are used to find qualitative and quantitative effect of interface trap charge on subthreshold slope (SS) of GAAMOSFET devices. Further, design constraints of GAAMOSFET devices with emphasis on the effect of interface trap charge on device SS performance are investigated.",
keywords = "Compact model, Drain-source current, Gate-all-around metal-oxide-semiconductor-field-effect-transistor (GAAMOSFET), Interface trap distribution, Scaling theory",
author = "Faraz Najam and Sangsig Kim and Yu, {Yun Seop}",
year = "2013",
month = "10",
day = "1",
doi = "10.5573/JSTS.2013.13.5.530",
language = "English",
volume = "13",
pages = "530--537",
journal = "Journal of Semiconductor Technology and Science",
issn = "1598-1657",
publisher = "Institute of Electronics Engineers of Korea",
number = "5",

}

TY - JOUR

T1 - Gate all around metal oxide field transistor

T2 - Surface potential calculation method including doping and interface trap charge and the effect of interface trap charge on subthreshold slope

AU - Najam, Faraz

AU - Kim, Sangsig

AU - Yu, Yun Seop

PY - 2013/10/1

Y1 - 2013/10/1

N2 - An explicit surface potential calculation method of gate-all-around MOSFET (GAAMOSFET) devices which takes into account both interface trap charge and varying doping levels is presented. The results of the method are extensively verified by numerical simulation. Results from the model are used to find qualitative and quantitative effect of interface trap charge on subthreshold slope (SS) of GAAMOSFET devices. Further, design constraints of GAAMOSFET devices with emphasis on the effect of interface trap charge on device SS performance are investigated.

AB - An explicit surface potential calculation method of gate-all-around MOSFET (GAAMOSFET) devices which takes into account both interface trap charge and varying doping levels is presented. The results of the method are extensively verified by numerical simulation. Results from the model are used to find qualitative and quantitative effect of interface trap charge on subthreshold slope (SS) of GAAMOSFET devices. Further, design constraints of GAAMOSFET devices with emphasis on the effect of interface trap charge on device SS performance are investigated.

KW - Compact model

KW - Drain-source current

KW - Gate-all-around metal-oxide-semiconductor-field-effect-transistor (GAAMOSFET)

KW - Interface trap distribution

KW - Scaling theory

UR - http://www.scopus.com/inward/record.url?scp=84886916173&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84886916173&partnerID=8YFLogxK

U2 - 10.5573/JSTS.2013.13.5.530

DO - 10.5573/JSTS.2013.13.5.530

M3 - Article

AN - SCOPUS:84886916173

VL - 13

SP - 530

EP - 537

JO - Journal of Semiconductor Technology and Science

JF - Journal of Semiconductor Technology and Science

SN - 1598-1657

IS - 5

ER -