GCC2verilog compiler toolset for complete translation of c programming language into verilog HDL

Giang Nguyen Thi Huong, Seon Wook Kim

Research output: Contribution to journalArticle

6 Citations (Scopus)

Abstract

Reconfigurable computing using a field-programmable gate-array (FPGA) device has become a promising solution in system design because of its power efficiency and design flexibility. To bring the benefit of FPGA to many application programmers, there has been intensive research about automatic translation from high-level programming languages (HLL) such as C and C++ into hardware. However, the large gap of syntaxes and emantics between hardware and software programming makes the translation challenging. In this paper, we introduce a new approach for the translation by using the widely used GCC compiler. By simply adding a hardware description language (HDL) backend to the existing stateof- the-art compiler, we could minimize an effort to implement the translator while supporting full features of HLL in the HLL-to-HDL translation and providing high performance. Our translator, called GCC2Verilog, was implemented as the GCC's cross compiler targeting at FPGAs instead of microprocessor architectures. Our experiment shows that we could achieve a speedup of up to 34 times and 17 times on average with 4-port memory over PICO microprocessor execution in selected EEMBC benchmarks.

Original languageEnglish
Pages (from-to)731-740
Number of pages10
JournalETRI Journal
Volume33
Issue number5
DOIs
Publication statusPublished - 2011 Oct 1

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Keywords

  • Compiler
  • FPGA
  • GCC2Verilog
  • HLL-to-HDL translator

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Computer Science(all)
  • Electrical and Electronic Engineering

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