Hierarchical data structure-based timing controller design for plasma display panels

Yeoul Na, Seok Joong Hwang, Giseong Bak, Seon Wook Kim, Cheol Ho Lee, Junkyu Min, Taejin Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

In this paper, we propose a timing controller design to use a hierarchical structure of control signals for plasma display panels (PDPs). Also, we used a double buffering and a repeatable FIFO in order to reduce the workload of memory accesses for control data, and provided a graphical user interface program for easy control data management. Our prototype system runs at 83 MHz on Spartan-3A DSP FPGA, and the new design achieves the reduction of 73% in resource usage from the previous implementation.

Original languageEnglish
Title of host publicationISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems
Pages4121-4124
Number of pages4
DOIs
Publication statusPublished - 2010 Aug 31
Event2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems, ISCAS 2010 - Paris, France
Duration: 2010 May 302010 Jun 2

Other

Other2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems, ISCAS 2010
CountryFrance
CityParis
Period10/5/3010/6/2

Fingerprint

Data structures
Display devices
Plasmas
Controllers
Graphical user interfaces
Information management
Field programmable gate arrays (FPGA)
Data storage equipment

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Na, Y., Hwang, S. J., Bak, G., Kim, S. W., Lee, C. H., Min, J., & Kim, T. (2010). Hierarchical data structure-based timing controller design for plasma display panels. In ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems (pp. 4121-4124). [5537616] https://doi.org/10.1109/ISCAS.2010.5537616

Hierarchical data structure-based timing controller design for plasma display panels. / Na, Yeoul; Hwang, Seok Joong; Bak, Giseong; Kim, Seon Wook; Lee, Cheol Ho; Min, Junkyu; Kim, Taejin.

ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems. 2010. p. 4121-4124 5537616.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Na, Y, Hwang, SJ, Bak, G, Kim, SW, Lee, CH, Min, J & Kim, T 2010, Hierarchical data structure-based timing controller design for plasma display panels. in ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems., 5537616, pp. 4121-4124, 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems, ISCAS 2010, Paris, France, 10/5/30. https://doi.org/10.1109/ISCAS.2010.5537616
Na Y, Hwang SJ, Bak G, Kim SW, Lee CH, Min J et al. Hierarchical data structure-based timing controller design for plasma display panels. In ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems. 2010. p. 4121-4124. 5537616 https://doi.org/10.1109/ISCAS.2010.5537616
Na, Yeoul ; Hwang, Seok Joong ; Bak, Giseong ; Kim, Seon Wook ; Lee, Cheol Ho ; Min, Junkyu ; Kim, Taejin. / Hierarchical data structure-based timing controller design for plasma display panels. ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems. 2010. pp. 4121-4124
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