High performance CMOS current comparator using resistive feedback network

Byung M. Min, Soo-Won Kim

Research output: Contribution to journalArticle

45 Citations (Scopus)

Abstract

A new high speed, low power and small area CMOS current comparator based on a resistive feedback network is proposed. Simulation results employing 0.35μm CMOS parameters demonstrate 7ns response time and 0.45mW power consumption for 0.1μA input current, which represents a ∼400% improvement in power-delay product over existing current comparators. In this design, the bias current and the input impedance are well controlled parameters, and the inherent autozeroing scheme does not require any offset compensation.

Original languageEnglish
Pages (from-to)2074-2076
Number of pages3
JournalElectronics Letters
Volume34
Issue number22
Publication statusPublished - 1998 Oct 29

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Feedback
Bias currents
Electric power utilization
Compensation and Redress

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

High performance CMOS current comparator using resistive feedback network. / Min, Byung M.; Kim, Soo-Won.

In: Electronics Letters, Vol. 34, No. 22, 29.10.1998, p. 2074-2076.

Research output: Contribution to journalArticle

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