High-speed RSA crypto-processor with radix-4 modular multiplication and Chinese remainder theorem

Bonseok Koo, Dongwook Lee, Gwonho Ryu, Taejoo Chang, Sangjin Lee

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

Today, RSA is one of the most popular public-key crypto-system in various applications. In this paper, we present a high-speed RSA crypto-processor with modified radix-4 Montgomery multiplication algorithm and Chinese Remainder Theorem (CRT). Our design takes 0.84M clock cycles for a 1024-bit modular exponentiation and 0.25M clock cycles for two 512-bit exponentiations. Using 0.18 um standard cell library, the processor achieves 365Kbps for a 1024-bit exponentiation and 1,233Kbps for two 512-bit exponentiations at a 300MHz clock rate. For the high performance RSA crypto-system, the processor can also execute modular reduction, which is essential for calculating the Montgomery mapping constant and the modularly reduced ciphertext in CRT technique.

Original languageEnglish
Title of host publicationInformation Security and Cryptology - ICISC 2006
Subtitle of host publication9th International Conference, Proceedings
Pages81-93
Number of pages13
Publication statusPublished - 2006
EventICISC 2006: 9th International Conference on Information Security and Cryptology - Busan, Korea, Republic of
Duration: 2006 Nov 302006 Dec 1

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume4296 LNCS
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

Other

OtherICISC 2006: 9th International Conference on Information Security and Cryptology
CountryKorea, Republic of
CityBusan
Period06/11/3006/12/1

Keywords

  • Booth's algorithm
  • Carry save adder
  • Chinese remainder theorem
  • Montgomery multiplication
  • RSA

ASJC Scopus subject areas

  • Theoretical Computer Science
  • Computer Science(all)

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  • Cite this

    Koo, B., Lee, D., Ryu, G., Chang, T., & Lee, S. (2006). High-speed RSA crypto-processor with radix-4 modular multiplication and Chinese remainder theorem. In Information Security and Cryptology - ICISC 2006: 9th International Conference, Proceedings (pp. 81-93). (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 4296 LNCS).