Impact of bottom-gate biasing on implant-free junctionless Ge-on-insulator n-MOSFETs

Hyeong Rak Lim, Seong Kwang Kim, Jae Hoon Han, Hansung Kim, Dae Myeong Geum, Yun Joong Lee, Byeong Kwon Ju, Hyung Jun Kim, Sanghyeon Kim

Research output: Contribution to journalArticle

Abstract

In this letter, we have fabricated Ge-on-insulator (Ge-OI) junctionless (JL) n-MOSFETs via wafer bonding and epitaxial lift-off (ELO) techniques. We have evaluated the electrical characteristics of Ge-OI JL n-MOSFETs with different thickness of Ge channel carefully thinned by the digital etching. Furthermore, the impact of bottom-gate biasing on the Ge-OI JL n-MOSFET devices with different Ge channel thicknesses has been demonstrated. High effective electron mobility (µeff) of 160 cm2/V · s was obtained from a Ge-OI JL n-MOSFET with an 18 nm-thick Ge channel and subthreshold slope (S.S.) of 230 mV/dec was extracted on an even thinner 10-nm-thick Ge-OI JL n-MOSFET. Also, due to the stronger coupling between the channel and bottom-gate, we demonstrated higher Vth tunability and improvement of µeff by bottom-gate biasing.

Original languageEnglish
Article number2931410
Pages (from-to)1362-1365
Number of pages4
JournalIEEE Electron Device Letters
Volume40
Issue number9
DOIs
Publication statusPublished - 2019 Sep

Keywords

  • Epitaxial lift-off
  • Ge MOSFETs
  • Ge-OI
  • Ge-on-Insulator
  • Junctionless MOSFETs
  • Wafer bonding

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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  • Cite this

    Lim, H. R., Kim, S. K., Han, J. H., Kim, H., Geum, D. M., Lee, Y. J., Ju, B. K., Kim, H. J., & Kim, S. (2019). Impact of bottom-gate biasing on implant-free junctionless Ge-on-insulator n-MOSFETs. IEEE Electron Device Letters, 40(9), 1362-1365. [2931410]. https://doi.org/10.1109/LED.2019.2931410