TY - JOUR
T1 - Impact of roughness of bottom electrodes on the resistive switching properties of platinum/nickel nitride/nickel 1 × 1 crossbar array resistive random access memory cells
AU - Kim, Hee Dong
AU - Yun, Min Ju
AU - Hong, Seok Man
AU - Park, Ju Hyun
AU - Jeon, Dong Su
AU - Kim, Tae Geun
N1 - Funding Information:
This work was supported by the National Research Foundation (NRF) of Korea grant funded by the Korean Government (MEST) (No. 2011-0028769 ) and, also through Leading Foreign Research Institute Recruitment Program (No. 2013-044975 ).
Copyright:
Copyright 2014 Elsevier B.V., All rights reserved.
PY - 2014/8/25
Y1 - 2014/8/25
N2 - In this study, we investigate the effect of the roughness height of bottom electrodes (BEs) on the resistive switching properties of a 1 × 1 platinum/nickel nitride/nickel (Pt/NiN/Ni) capacitor crossbar array (CBA) resistive random access memory (ReRAM) cell. The thickness of the rough surface is varied from 40 nm to 80 nm. In the resistive switching tests, the set voltage in the current-voltage (I-V) curves is reduced by using a rough surface (RS) BE in the Si wafer, and the reset current is reduced by increasing the surface roughness height of the Si wafer. On the other hand, there is a reduction in VSET/RESET and ISET/RESET variations in the I-V curves over 100 repetitive switching cycles when a surface roughness of 40 nm is employed. Further, for the CBA ReRAM, the current is the most stable when using the 40 nm-thick RS Si wafer at the high-resistance state and low-resistance state for 300,000 s in the retention test. These results show that use of the roughness substrate in the CBA ReRAM structure is effective in reducing variations in operating voltage and current.
AB - In this study, we investigate the effect of the roughness height of bottom electrodes (BEs) on the resistive switching properties of a 1 × 1 platinum/nickel nitride/nickel (Pt/NiN/Ni) capacitor crossbar array (CBA) resistive random access memory (ReRAM) cell. The thickness of the rough surface is varied from 40 nm to 80 nm. In the resistive switching tests, the set voltage in the current-voltage (I-V) curves is reduced by using a rough surface (RS) BE in the Si wafer, and the reset current is reduced by increasing the surface roughness height of the Si wafer. On the other hand, there is a reduction in VSET/RESET and ISET/RESET variations in the I-V curves over 100 repetitive switching cycles when a surface roughness of 40 nm is employed. Further, for the CBA ReRAM, the current is the most stable when using the 40 nm-thick RS Si wafer at the high-resistance state and low-resistance state for 300,000 s in the retention test. These results show that use of the roughness substrate in the CBA ReRAM structure is effective in reducing variations in operating voltage and current.
KW - Nickel nitride films
KW - Resistive switching memory
KW - Surface roughness
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U2 - 10.1016/j.mee.2014.07.018
DO - 10.1016/j.mee.2014.07.018
M3 - Article
AN - SCOPUS:84907371230
SN - 0167-9317
VL - 126
SP - 169
EP - 172
JO - Microelectronic Engineering
JF - Microelectronic Engineering
ER -