Influence of plasma-etch damage on the interface states in SOI structures investigated by capacitance-voltage measurements and simulations

Yeong Deuk Jo, Jung Hyuk Koh, Jae Geun Ha, Ji Hong Kim, Dae Hyung Cho, Byung-Moo Moon, Sang Mo Koo

Research output: Contribution to journalArticle

1 Citation (Scopus)

Abstract

Au/SiO2/n-Si metal-oxide-silicon-on-insulator (MOSOI) capacitors were fabricated to study the damage caused by reactive ion etching (RIE) on (1 1 0) oriented silicon-on-insulator (SOI) substrates. The MOSOI capacitors with an etch-damaged SOI layer were characterized by capacitance-voltage (C-V) measurements and compared to the sacrificial oxidation treated samples and the reference samples without etching treatment. The measurements revealed that C-V curves significantly change and a negative voltage shift occurs for plasma-damaged capacitors. The simulated band diagram profiles and potential distribution of the corresponding structures indicate that the C-V shift is mainly due to the removal of a parasitic depletion capacitance (Cp) in the substrate, when the interface charges (Qf) are present at the gate oxide/SOI interface. For etch-damaged MOSOI samples, the surface roughness and the interface charges (Qf) have been found to increase by ∼1.94 × 1012 cm-2 with respect to the reference devices, whereas the increase was reduced for sacrificial-oxidation treated samples, which implies a recovery from the plasma-induced etch damage on SOI structures.

Original languageEnglish
Article number125005
JournalSemiconductor Science and Technology
Volume24
Issue number12
DOIs
Publication statusPublished - 2009 Dec 1

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials
  • Materials Chemistry
  • Condensed Matter Physics

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