Linearity improvement of cascode low-noise amplifiers using double DS method with a tuned inductor

Chi Wan Park, Youngbin Ahn, Jae Hoon Lee, Jichai Jeong

Research output: Contribution to journalArticle

Abstract

We propose a highly linear low-noise amplifier (LNA) using the double derivative superposition method with a tuned inductor. This topology has an auxiliary common gate stage of the cascode amplifier to cancel each third-order intermodulation distortion (IMD3) component and can provide a high third-order input intercept point (IIP3) for the 5.25GHz frequency band. From the simulation results using the TSMC 0.18 μm RF CMOS process, the IIP3 in the proposed cascode LNAs can be improved by 9dB, compared with the conventional derivative superposition method. The proposed LNA achieves an IIP3 of + 15 dBm with a gain of 10.5 dB, a noise figure of 2.4 dB, and a power consumption of 6mA at 1.5 V.

Original languageEnglish
Pages (from-to)847-855
Number of pages9
JournalInternational Journal of Electronics
Volume97
Issue number7
DOIs
Publication statusPublished - 2010 Jul 1

Fingerprint

Low noise amplifiers
Derivatives
Intermodulation distortion
Noise figure
Frequency bands
Electric power utilization
Topology
Cascode amplifiers

Keywords

  • derivative superposition
  • low-noise amplifier
  • third order input intercept point

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Linearity improvement of cascode low-noise amplifiers using double DS method with a tuned inductor. / Park, Chi Wan; Ahn, Youngbin; Lee, Jae Hoon; Jeong, Jichai.

In: International Journal of Electronics, Vol. 97, No. 7, 01.07.2010, p. 847-855.

Research output: Contribution to journalArticle

@article{deb022bac0144be585f8ac69242a9c22,
title = "Linearity improvement of cascode low-noise amplifiers using double DS method with a tuned inductor",
abstract = "We propose a highly linear low-noise amplifier (LNA) using the double derivative superposition method with a tuned inductor. This topology has an auxiliary common gate stage of the cascode amplifier to cancel each third-order intermodulation distortion (IMD3) component and can provide a high third-order input intercept point (IIP3) for the 5.25GHz frequency band. From the simulation results using the TSMC 0.18 μm RF CMOS process, the IIP3 in the proposed cascode LNAs can be improved by 9dB, compared with the conventional derivative superposition method. The proposed LNA achieves an IIP3 of + 15 dBm with a gain of 10.5 dB, a noise figure of 2.4 dB, and a power consumption of 6mA at 1.5 V.",
keywords = "derivative superposition, low-noise amplifier, third order input intercept point",
author = "Park, {Chi Wan} and Youngbin Ahn and Lee, {Jae Hoon} and Jichai Jeong",
year = "2010",
month = "7",
day = "1",
doi = "10.1080/00207211003697871",
language = "English",
volume = "97",
pages = "847--855",
journal = "International Journal of Electronics",
issn = "0020-7217",
publisher = "Taylor and Francis Ltd.",
number = "7",

}

TY - JOUR

T1 - Linearity improvement of cascode low-noise amplifiers using double DS method with a tuned inductor

AU - Park, Chi Wan

AU - Ahn, Youngbin

AU - Lee, Jae Hoon

AU - Jeong, Jichai

PY - 2010/7/1

Y1 - 2010/7/1

N2 - We propose a highly linear low-noise amplifier (LNA) using the double derivative superposition method with a tuned inductor. This topology has an auxiliary common gate stage of the cascode amplifier to cancel each third-order intermodulation distortion (IMD3) component and can provide a high third-order input intercept point (IIP3) for the 5.25GHz frequency band. From the simulation results using the TSMC 0.18 μm RF CMOS process, the IIP3 in the proposed cascode LNAs can be improved by 9dB, compared with the conventional derivative superposition method. The proposed LNA achieves an IIP3 of + 15 dBm with a gain of 10.5 dB, a noise figure of 2.4 dB, and a power consumption of 6mA at 1.5 V.

AB - We propose a highly linear low-noise amplifier (LNA) using the double derivative superposition method with a tuned inductor. This topology has an auxiliary common gate stage of the cascode amplifier to cancel each third-order intermodulation distortion (IMD3) component and can provide a high third-order input intercept point (IIP3) for the 5.25GHz frequency band. From the simulation results using the TSMC 0.18 μm RF CMOS process, the IIP3 in the proposed cascode LNAs can be improved by 9dB, compared with the conventional derivative superposition method. The proposed LNA achieves an IIP3 of + 15 dBm with a gain of 10.5 dB, a noise figure of 2.4 dB, and a power consumption of 6mA at 1.5 V.

KW - derivative superposition

KW - low-noise amplifier

KW - third order input intercept point

UR - http://www.scopus.com/inward/record.url?scp=77954337816&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=77954337816&partnerID=8YFLogxK

U2 - 10.1080/00207211003697871

DO - 10.1080/00207211003697871

M3 - Article

VL - 97

SP - 847

EP - 855

JO - International Journal of Electronics

JF - International Journal of Electronics

SN - 0020-7217

IS - 7

ER -