Abstract
Sort can be speeded up on parallel computers by dividing and computing data individually in parallel. Merge sort can be parallelized, however, the conventional algorithm implemented on distributed memory computers has poor performance due to the successive reduction of the number of active (non-idling) processors by a half, up to one in the last merging stage. This paper presents load-balanced parallel merge sort algorithm where all processors participate in merging throughout the computation. Data are evenly distributed to all processors, and every processor is forced to work in merging phase. Significant enhancement of the performance has been achieved. Our analysis shows the upper bound of the speedup of the merge time as (P - 1)/ log P. We have had a speedup of 9.6 (upper bound is 10.5) on 32-processor Cray T3E in sorting of 4M 32-bit integers. The same idea can be applied to parallellize other sorting algorithms.
| Original language | English |
|---|---|
| Title of host publication | Proceedings - International Parallel and Distributed Processing Symposium, IPDPS 2002 |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Pages | 248 |
| Number of pages | 1 |
| ISBN (Print) | 0769515738, 9780769515731 |
| DOIs | |
| Publication status | Published - 2002 |
| Event | 16th International Parallel and Distributed Processing Symposium, IPDPS 2002 - Ft. Lauderdale, United States Duration: 2002 Apr 15 → 2002 Apr 19 |
Other
| Other | 16th International Parallel and Distributed Processing Symposium, IPDPS 2002 |
|---|---|
| Country/Territory | United States |
| City | Ft. Lauderdale |
| Period | 02/4/15 → 02/4/19 |
ASJC Scopus subject areas
- Computer Networks and Communications
- Modelling and Simulation