Abstract
In the uplink transmission of massive (or large-scale) multi-input multi-output (MIMO) systems, large dimensional signal detection and its hardware design are challenging issues owing to the high computational complexity. In this paper, we propose low-complexity hardware architectures of Richardson iterative methodbased massive MIMO detectors. We present two types of massive MIMO detectors, directly mapped (type1) and reformulated (type2) Richardson iterative methods. In the proposed Richardson method (type2), the matrixby-matrix multiplications are reformulated to matrixvector multiplications, thus reducing the computational complexity from O(U2) to O(U). Both massive MIMO detectors are implemented using a 65 nm CMOS process and compared in terms of detection performance under different channel conditions (high-mobility and flat fading channels). The hardware implementation results confirm that the proposed type1 Richardson method-based detector demonstrates up to 50% power savings over the proposed type2 detector under a flat fading channel. The type2 detector indicates a 37% power savings compared to the type1 under a high-mobility channel.
Original language | English |
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Pages (from-to) | 326-335 |
Number of pages | 10 |
Journal | ETRI Journal |
Volume | 39 |
Issue number | 3 |
DOIs | |
Publication status | Published - 2017 Jun |
Keywords
- Channel matrix
- Iterative signal detection
- Massive MIMO
- Reformulation
- Richardson method
- Very large scale integration (VLSI) implementation
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Computer Science(all)
- Electrical and Electronic Engineering