Low-cost application-aware DVFS for multi-core architecture

Joonho Kong, Jinhang Choi, Lynn Choi, Sung Woo Jung

Research output: Chapter in Book/Report/Conference proceedingConference contribution

15 Citations (Scopus)

Abstract

As technology scales down, energy/power consumption in the microprocessor has become a serious problem. Especially, as the industry moves on to multi-core processor systems, energy/power management in multi-core systems has become more and more important. In this paper, we propose new DVFS technique in multi-core systems. Our proposed technique finds the optimal DVFS level using Energy-Delay Product (EDP) and Energy-Delay 2 Product (ED 2 P), which considers energy-efficiency of computation. According to determined DVFS level, the voltage and frequency of processor cores are changed. In our evaluations, our proposed technique shows 5.6% and 54.3% EDP reduction compared to the energy-biased and performance-biased scheme, respectively. In case of ED 2 P, our proposed technique reduces 36.4% and 14.7% of ED 2P compared to the energy-biased and performance-biased scheme, respectively. The proposed technique can be a good alternative in future multi-core system where the both energy/power consumption and performance are critical.

Original languageEnglish
Title of host publicationProceedings - 3rd International Conference on Convergence and Hybrid Information Technology, ICCIT 2008
Pages106-111
Number of pages6
Volume2
DOIs
Publication statusPublished - 2008 Dec 29
Event3rd International Conference on Convergence and Hybrid Information Technology, ICCIT 2008 - Busan, Korea, Republic of
Duration: 2008 Nov 112008 Nov 13

Other

Other3rd International Conference on Convergence and Hybrid Information Technology, ICCIT 2008
CountryKorea, Republic of
CityBusan
Period08/11/1108/11/13

Fingerprint

Electric power utilization
Electron energy levels
Energy efficiency
Microprocessor chips
Costs
Electric potential
Industry
Power management

ASJC Scopus subject areas

  • Information Systems
  • Software

Cite this

Kong, J., Choi, J., Choi, L., & Jung, S. W. (2008). Low-cost application-aware DVFS for multi-core architecture. In Proceedings - 3rd International Conference on Convergence and Hybrid Information Technology, ICCIT 2008 (Vol. 2, pp. 106-111). [4682222] https://doi.org/10.1109/ICCIT.2008.124

Low-cost application-aware DVFS for multi-core architecture. / Kong, Joonho; Choi, Jinhang; Choi, Lynn; Jung, Sung Woo.

Proceedings - 3rd International Conference on Convergence and Hybrid Information Technology, ICCIT 2008. Vol. 2 2008. p. 106-111 4682222.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Kong, J, Choi, J, Choi, L & Jung, SW 2008, Low-cost application-aware DVFS for multi-core architecture. in Proceedings - 3rd International Conference on Convergence and Hybrid Information Technology, ICCIT 2008. vol. 2, 4682222, pp. 106-111, 3rd International Conference on Convergence and Hybrid Information Technology, ICCIT 2008, Busan, Korea, Republic of, 08/11/11. https://doi.org/10.1109/ICCIT.2008.124
Kong J, Choi J, Choi L, Jung SW. Low-cost application-aware DVFS for multi-core architecture. In Proceedings - 3rd International Conference on Convergence and Hybrid Information Technology, ICCIT 2008. Vol. 2. 2008. p. 106-111. 4682222 https://doi.org/10.1109/ICCIT.2008.124
Kong, Joonho ; Choi, Jinhang ; Choi, Lynn ; Jung, Sung Woo. / Low-cost application-aware DVFS for multi-core architecture. Proceedings - 3rd International Conference on Convergence and Hybrid Information Technology, ICCIT 2008. Vol. 2 2008. pp. 106-111
@inproceedings{0de223365ae844c7a02464b395b6168c,
title = "Low-cost application-aware DVFS for multi-core architecture",
abstract = "As technology scales down, energy/power consumption in the microprocessor has become a serious problem. Especially, as the industry moves on to multi-core processor systems, energy/power management in multi-core systems has become more and more important. In this paper, we propose new DVFS technique in multi-core systems. Our proposed technique finds the optimal DVFS level using Energy-Delay Product (EDP) and Energy-Delay 2 Product (ED 2 P), which considers energy-efficiency of computation. According to determined DVFS level, the voltage and frequency of processor cores are changed. In our evaluations, our proposed technique shows 5.6{\%} and 54.3{\%} EDP reduction compared to the energy-biased and performance-biased scheme, respectively. In case of ED 2 P, our proposed technique reduces 36.4{\%} and 14.7{\%} of ED 2P compared to the energy-biased and performance-biased scheme, respectively. The proposed technique can be a good alternative in future multi-core system where the both energy/power consumption and performance are critical.",
author = "Joonho Kong and Jinhang Choi and Lynn Choi and Jung, {Sung Woo}",
year = "2008",
month = "12",
day = "29",
doi = "10.1109/ICCIT.2008.124",
language = "English",
isbn = "9780769534077",
volume = "2",
pages = "106--111",
booktitle = "Proceedings - 3rd International Conference on Convergence and Hybrid Information Technology, ICCIT 2008",

}

TY - GEN

T1 - Low-cost application-aware DVFS for multi-core architecture

AU - Kong, Joonho

AU - Choi, Jinhang

AU - Choi, Lynn

AU - Jung, Sung Woo

PY - 2008/12/29

Y1 - 2008/12/29

N2 - As technology scales down, energy/power consumption in the microprocessor has become a serious problem. Especially, as the industry moves on to multi-core processor systems, energy/power management in multi-core systems has become more and more important. In this paper, we propose new DVFS technique in multi-core systems. Our proposed technique finds the optimal DVFS level using Energy-Delay Product (EDP) and Energy-Delay 2 Product (ED 2 P), which considers energy-efficiency of computation. According to determined DVFS level, the voltage and frequency of processor cores are changed. In our evaluations, our proposed technique shows 5.6% and 54.3% EDP reduction compared to the energy-biased and performance-biased scheme, respectively. In case of ED 2 P, our proposed technique reduces 36.4% and 14.7% of ED 2P compared to the energy-biased and performance-biased scheme, respectively. The proposed technique can be a good alternative in future multi-core system where the both energy/power consumption and performance are critical.

AB - As technology scales down, energy/power consumption in the microprocessor has become a serious problem. Especially, as the industry moves on to multi-core processor systems, energy/power management in multi-core systems has become more and more important. In this paper, we propose new DVFS technique in multi-core systems. Our proposed technique finds the optimal DVFS level using Energy-Delay Product (EDP) and Energy-Delay 2 Product (ED 2 P), which considers energy-efficiency of computation. According to determined DVFS level, the voltage and frequency of processor cores are changed. In our evaluations, our proposed technique shows 5.6% and 54.3% EDP reduction compared to the energy-biased and performance-biased scheme, respectively. In case of ED 2 P, our proposed technique reduces 36.4% and 14.7% of ED 2P compared to the energy-biased and performance-biased scheme, respectively. The proposed technique can be a good alternative in future multi-core system where the both energy/power consumption and performance are critical.

UR - http://www.scopus.com/inward/record.url?scp=57849124109&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=57849124109&partnerID=8YFLogxK

U2 - 10.1109/ICCIT.2008.124

DO - 10.1109/ICCIT.2008.124

M3 - Conference contribution

AN - SCOPUS:57849124109

SN - 9780769534077

VL - 2

SP - 106

EP - 111

BT - Proceedings - 3rd International Conference on Convergence and Hybrid Information Technology, ICCIT 2008

ER -