TY - GEN
T1 - Low cost heterogeneous ARiA S-box implementation for CPA-resistance
AU - Cho, Junghoon
AU - Song, Junhyun
AU - Park, Jongsun
N1 - Funding Information:
This work was supported in part by National R&D Program through the National Research Foundation of Korea funded by Ministry of Science and ICT (NRF-2020M3F3A2A01082591)
Publisher Copyright:
© 2021 IEEE
PY - 2021
Y1 - 2021
N2 - Implementing countermeasure against power analysis-based attack is a critical issue in cryptographic hardware implementation. Protection schemes such as masking or Threshold Implementation (TI) have been proposed for hardware protection, but they have shortages like insufficient protection ability, or excessive hardware overhead. In this paper, we present low cost hetero S-box hardware implementation, where S-box groups for ARIA algorithm can be implemented using the coefficients with different hardware cost. Additional area reduction scheme using isomorphism sharing between S-boxes are also proposed. The proposed heterogeneous ARIS S-box has been implemented using 28nm CMOS process, and it showed 39% area saving with 30% of power saving. The proposed hardware also passed the security test, showing that it is verified as secure against power analysis-based attacks.
AB - Implementing countermeasure against power analysis-based attack is a critical issue in cryptographic hardware implementation. Protection schemes such as masking or Threshold Implementation (TI) have been proposed for hardware protection, but they have shortages like insufficient protection ability, or excessive hardware overhead. In this paper, we present low cost hetero S-box hardware implementation, where S-box groups for ARIA algorithm can be implemented using the coefficients with different hardware cost. Additional area reduction scheme using isomorphism sharing between S-boxes are also proposed. The proposed heterogeneous ARIS S-box has been implemented using 28nm CMOS process, and it showed 39% area saving with 30% of power saving. The proposed hardware also passed the security test, showing that it is verified as secure against power analysis-based attacks.
KW - ARIA
KW - Composite field
KW - Correlation power analysis
KW - Hardware sharing
UR - http://www.scopus.com/inward/record.url?scp=85108999663&partnerID=8YFLogxK
U2 - 10.1109/ISCAS51556.2021.9401364
DO - 10.1109/ISCAS51556.2021.9401364
M3 - Conference contribution
AN - SCOPUS:85108999663
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
BT - 2021 IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021
Y2 - 22 May 2021 through 28 May 2021
ER -