Low Cost Ternary Content Addressable Memory Using Adaptive Matchline Discharging Scheme

Woong Choi, Kyeongho Lee, Jongsun Park

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

This paper presents an adaptive match-line (ML) discharging scheme for low power and high speed ternary content addressable memory (TCAM). In the proposed TCAM, by employing the gated ML pulldown path and ML boosting scheme, the redundant ML discharging and SL switching are eliminated while improving the search speed. By considering the number of mismatch and ML discharging speed, the ML discharging is adaptively controlled in the proposed TCAM. The simulation results with the 65nm CMOS technology show that the proposed adaptive ML discharging scheme improves up to 19% of sensing delay and saves 81% of ML power compared to the conventional approach. When compared with the state-of-the-art work, the post-layout simulations show 10% improvement of FOM (energy/bit/search).

Original languageEnglish
Title of host publication2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
Volume2018-May
ISBN (Electronic)9781538648810
DOIs
Publication statusPublished - 2018 Apr 26
Event2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Florence, Italy
Duration: 2018 May 272018 May 30

Other

Other2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018
CountryItaly
CityFlorence
Period18/5/2718/5/30

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Associative storage
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Keywords

  • adaptive sensing
  • CAM
  • content addressable memory
  • memory
  • reference voltage
  • sensing margin
  • TCAM

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Choi, W., Lee, K., & Park, J. (2018). Low Cost Ternary Content Addressable Memory Using Adaptive Matchline Discharging Scheme. In 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings (Vol. 2018-May). [8351461] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISCAS.2018.8351461

Low Cost Ternary Content Addressable Memory Using Adaptive Matchline Discharging Scheme. / Choi, Woong; Lee, Kyeongho; Park, Jongsun.

2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings. Vol. 2018-May Institute of Electrical and Electronics Engineers Inc., 2018. 8351461.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Choi, W, Lee, K & Park, J 2018, Low Cost Ternary Content Addressable Memory Using Adaptive Matchline Discharging Scheme. in 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings. vol. 2018-May, 8351461, Institute of Electrical and Electronics Engineers Inc., 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018, Florence, Italy, 18/5/27. https://doi.org/10.1109/ISCAS.2018.8351461
Choi W, Lee K, Park J. Low Cost Ternary Content Addressable Memory Using Adaptive Matchline Discharging Scheme. In 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings. Vol. 2018-May. Institute of Electrical and Electronics Engineers Inc. 2018. 8351461 https://doi.org/10.1109/ISCAS.2018.8351461
Choi, Woong ; Lee, Kyeongho ; Park, Jongsun. / Low Cost Ternary Content Addressable Memory Using Adaptive Matchline Discharging Scheme. 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings. Vol. 2018-May Institute of Electrical and Electronics Engineers Inc., 2018.
@inproceedings{add18ac07b0d49fdb0166c1db378ff41,
title = "Low Cost Ternary Content Addressable Memory Using Adaptive Matchline Discharging Scheme",
abstract = "This paper presents an adaptive match-line (ML) discharging scheme for low power and high speed ternary content addressable memory (TCAM). In the proposed TCAM, by employing the gated ML pulldown path and ML boosting scheme, the redundant ML discharging and SL switching are eliminated while improving the search speed. By considering the number of mismatch and ML discharging speed, the ML discharging is adaptively controlled in the proposed TCAM. The simulation results with the 65nm CMOS technology show that the proposed adaptive ML discharging scheme improves up to 19{\%} of sensing delay and saves 81{\%} of ML power compared to the conventional approach. When compared with the state-of-the-art work, the post-layout simulations show 10{\%} improvement of FOM (energy/bit/search).",
keywords = "adaptive sensing, CAM, content addressable memory, memory, reference voltage, sensing margin, TCAM",
author = "Woong Choi and Kyeongho Lee and Jongsun Park",
year = "2018",
month = "4",
day = "26",
doi = "10.1109/ISCAS.2018.8351461",
language = "English",
volume = "2018-May",
booktitle = "2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings",
publisher = "Institute of Electrical and Electronics Engineers Inc.",

}

TY - GEN

T1 - Low Cost Ternary Content Addressable Memory Using Adaptive Matchline Discharging Scheme

AU - Choi, Woong

AU - Lee, Kyeongho

AU - Park, Jongsun

PY - 2018/4/26

Y1 - 2018/4/26

N2 - This paper presents an adaptive match-line (ML) discharging scheme for low power and high speed ternary content addressable memory (TCAM). In the proposed TCAM, by employing the gated ML pulldown path and ML boosting scheme, the redundant ML discharging and SL switching are eliminated while improving the search speed. By considering the number of mismatch and ML discharging speed, the ML discharging is adaptively controlled in the proposed TCAM. The simulation results with the 65nm CMOS technology show that the proposed adaptive ML discharging scheme improves up to 19% of sensing delay and saves 81% of ML power compared to the conventional approach. When compared with the state-of-the-art work, the post-layout simulations show 10% improvement of FOM (energy/bit/search).

AB - This paper presents an adaptive match-line (ML) discharging scheme for low power and high speed ternary content addressable memory (TCAM). In the proposed TCAM, by employing the gated ML pulldown path and ML boosting scheme, the redundant ML discharging and SL switching are eliminated while improving the search speed. By considering the number of mismatch and ML discharging speed, the ML discharging is adaptively controlled in the proposed TCAM. The simulation results with the 65nm CMOS technology show that the proposed adaptive ML discharging scheme improves up to 19% of sensing delay and saves 81% of ML power compared to the conventional approach. When compared with the state-of-the-art work, the post-layout simulations show 10% improvement of FOM (energy/bit/search).

KW - adaptive sensing

KW - CAM

KW - content addressable memory

KW - memory

KW - reference voltage

KW - sensing margin

KW - TCAM

UR - http://www.scopus.com/inward/record.url?scp=85057079195&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85057079195&partnerID=8YFLogxK

U2 - 10.1109/ISCAS.2018.8351461

DO - 10.1109/ISCAS.2018.8351461

M3 - Conference contribution

AN - SCOPUS:85057079195

VL - 2018-May

BT - 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings

PB - Institute of Electrical and Electronics Engineers Inc.

ER -