Low energy domain wall memory based convolution neural network design with optimizing MAC architecture

Jooyoon Kim, Yunho Jang, Taehwan Kim, Jongsun Park

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Running a convolutional neural network (CNN) algorithm using dedicated integrated circuits (ICs) on real-time portable applications is mainly restricted by slow performance and large power consumption. The power and delay are mainly due to external memory access, which incurs considerable energy consumption and bandwidth issues. In this paper, we propose an efficient convolution layer design using domain wall memory (DWM) for eliminating external memory access in image sensor embedded applications. A low energy access scheme using tag is employed to further reduce power consumption. The experimental results show that the proposed CNN architecture achieves 11.2% memory energy savings and 21.8% of MAC operation reduction compared to conventional architecture.

Original languageEnglish
Title of host publication2021 IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728192017
DOIs
Publication statusPublished - 2021
Event53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Daegu, Korea, Republic of
Duration: 2021 May 222021 May 28

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
Volume2021-May
ISSN (Print)0271-4310

Conference

Conference53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021
Country/TerritoryKorea, Republic of
CityDaegu
Period21/5/2221/5/28

Keywords

  • Convolution neural network
  • Domain wall memory

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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