Low-power Programmable Divider for Multi-standard Frequency Synthesizers Using Reset and Modulus Signal Generator

Kyu Young Kim, Woo Kwan Lee, Hoonki Kim, Soo-Won Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8 Citations (Scopus)

Abstract

This paper proposes a low-power programmable divider for multi-standard frequency synthesizers using a reset and modulus control signal (RMS) generator. The use of RMS generator enables the adaptation of only one counter. This results in less power consumption and effective area. Our design also includes modified D flip-flop design. Proposed divider was designed and fabricated in a standard 0.18-um CMOS technology. Its divide ratio covers from 13 to 1278 at 3GHz. The average power is 3.58μW with 1.5V power supply and effective area is 0.0408mm2.

Original languageEnglish
Title of host publicationProceedings of 2008 IEEE Asian Solid-State Circuits Conference, A-SSCC 2008
Pages77-80
Number of pages4
DOIs
Publication statusPublished - 2008 Dec 1
Event2008 IEEE Asian Solid-State Circuits Conference, A-SSCC 2008 - Fukuoka, Japan
Duration: 2008 Nov 32008 Nov 5

Other

Other2008 IEEE Asian Solid-State Circuits Conference, A-SSCC 2008
CountryJapan
CityFukuoka
Period08/11/308/11/5

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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    Kim, K. Y., Lee, W. K., Kim, H., & Kim, S-W. (2008). Low-power Programmable Divider for Multi-standard Frequency Synthesizers Using Reset and Modulus Signal Generator. In Proceedings of 2008 IEEE Asian Solid-State Circuits Conference, A-SSCC 2008 (pp. 77-80). [4708733] https://doi.org/10.1109/ASSCC.2008.4708733