Abstract
We present a low-power reconfigurable DCT architecture, which is based on computation sharing multiplier (CSHM). CSHM specifically targets computation re-use in vector-scalar products and is effectively used in our DCT implementation. A low power reconfigurable DCT architecture is exploited by making a trade off between image quality and power consumption. The proposed DCT architecture was implemented using 0.35μ technology. The experimental results show that reconfigurable DCT using CSHM can improve power consumption by 40% without noticeable image quality degradation.
| Original language | English |
|---|---|
| Title of host publication | ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings |
| Volume | 3 |
| Publication status | Published - 2002 |
| Externally published | Yes |
| Event | 2002 IEEE International Conference on Acoustic, Speech, and Signal Processing - Orlando, FL, United States Duration: 2002 May 13 → 2002 May 17 |
Other
| Other | 2002 IEEE International Conference on Acoustic, Speech, and Signal Processing |
|---|---|
| Country | United States |
| City | Orlando, FL |
| Period | 02/5/13 → 02/5/17 |
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ASJC Scopus subject areas
- Electrical and Electronic Engineering
- Signal Processing
- Acoustics and Ultrasonics
Cite this
Low power reconfigurable DCT design based on sharing multiplication. / Park, Jongsun; Kwon, Soonkeon; Roy, Kaushik.
ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings. Vol. 3 2002.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
}
TY - GEN
T1 - Low power reconfigurable DCT design based on sharing multiplication
AU - Park, Jongsun
AU - Kwon, Soonkeon
AU - Roy, Kaushik
PY - 2002
Y1 - 2002
N2 - We present a low-power reconfigurable DCT architecture, which is based on computation sharing multiplier (CSHM). CSHM specifically targets computation re-use in vector-scalar products and is effectively used in our DCT implementation. A low power reconfigurable DCT architecture is exploited by making a trade off between image quality and power consumption. The proposed DCT architecture was implemented using 0.35μ technology. The experimental results show that reconfigurable DCT using CSHM can improve power consumption by 40% without noticeable image quality degradation.
AB - We present a low-power reconfigurable DCT architecture, which is based on computation sharing multiplier (CSHM). CSHM specifically targets computation re-use in vector-scalar products and is effectively used in our DCT implementation. A low power reconfigurable DCT architecture is exploited by making a trade off between image quality and power consumption. The proposed DCT architecture was implemented using 0.35μ technology. The experimental results show that reconfigurable DCT using CSHM can improve power consumption by 40% without noticeable image quality degradation.
UR - http://www.scopus.com/inward/record.url?scp=19244382355&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=19244382355&partnerID=8YFLogxK
M3 - Conference contribution
AN - SCOPUS:19244382355
VL - 3
BT - ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings
ER -