Abstract
We present a low-power reconfigurable DCT architecture, which is based on computation sharing multiplier (CSHM). CSHM specifically targets computation re-use in vector-scalar products and is effectively used in our DCT implementation. A low power reconfigurable DCT architecture is exploited by making a trade off between image quality and power consumption. The proposed DCT architecture was implemented using 0.35μ technology. The experimental results show that reconfigurable DCT using CSHM can improve power consumption by 40% without noticeable image quality degradation.
| Original language | English |
|---|---|
| Pages (from-to) | III/3116-III/3119 |
| Journal | ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings |
| Volume | 3 |
| DOIs | |
| Publication status | Published - 2002 |
| Externally published | Yes |
| Event | 2002 IEEE International Conference on Acoustic, Speech, and Signal Processing - Orlando, FL, United States Duration: 2002 May 13 → 2002 May 17 |
ASJC Scopus subject areas
- Software
- Signal Processing
- Electrical and Electronic Engineering
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Cite this
Park, J., Kwon, S., & Roy, K. (2002). Low power reconfigurable DCT design based on sharing multiplication. ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings, 3, III/3116-III/3119. https://doi.org/10.1109/icassp.2002.5745309