This paper presents design challenges and solutions for the fifth generation (5G) phased-array transceiver ICs in millimeter-wave (MMW) frequency bands. A 28nm bulk CMOS device technology is selected to integrate multiple RF phased-array elements in a single-chip to achieve a high-level of TX EIRP and RX sensitivity. Several design approaches of gain, POUT, stability, reliability and linearity enhancement techniques are applied to enable CMOS as a key device solution for 5G applications in MMW frequency bands. A 39GHz band 16-channel CMOS RF phased-array transceiver IC is designed and can support 4T/4R MIMO base-station applications including ×64 RF phased-array ICs (total 1, 024 phased-array elements). T/RX paths have gain dynamic ranges of >30/40dB for flexibility and scalability. The TX path shows POUT/Ch. of >6.0dBm at EVM of -34dB (800MHz) and PDC/Ch. of 105mW. The RX path performs NF of 4.2dB, EVM of -38dB (100MHz) and PDC/Ch. of 39mW. These state-of-the-art results lead to TX EIRP of >55dBm and RX sensitivity of <-113dBm/100MHz in the 5G NR base-station system.