Abstract
Koç and Sunar proposed an architecture of the Mastrovito multiplier for the irreducible trinomial f(x)=x n+x k+1 , where k ≠ n/2 to reduce the time complexity. Also, many multipliers based on the Karatsuba-Ofman algorithm (KOA) was proposed that sacrificed time efficiency for low space complexity. In this paper, a new multiplication formula which is a variant of KOA presented. We also provide a straightforward architecture of a non-pipelined bit-parallel multiplier using the new formula. The proposed multiplier has lower space complexity than and comparable time complexity to previous Mastrovito multipliers' for all irreducible trinomials.
Original language | English |
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Article number | 5999752 |
Pages (from-to) | 1903-1908 |
Number of pages | 6 |
Journal | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
Volume | 20 |
Issue number | 10 |
DOIs | |
Publication status | Published - 2012 |
Keywords
- Bit-parallel multiplier
- Mastrovito multiplication
- finite field
- irreducible trinomial
- polynomial basis
ASJC Scopus subject areas
- Software
- Hardware and Architecture
- Electrical and Electronic Engineering