An improved clock-feedthrough compensation scheme for switched current system is proposed. Both the signal dependent and the constant clock-feedthrough terms are canceled by using both nMOS and pMOS current samplers and by adopting a source replication technique. The proposed current memory cell was fabricated with 0.6-μm CMOS process. Both experimental and theoretical results on clock-feedthrough error reveal substantial reduction over the existing compensation schemes.
|Number of pages||4|
|Journal||IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing|
|Publication status||Published - 1998 Dec 1|
ASJC Scopus subject areas
- Electrical and Electronic Engineering
- Signal Processing