Non-alloyed ohmic contacts on GaAs using metal-interlayer-semiconductor structure with SF6 plasma treatment

Seung Hwan Kim; Gwang Sik Kim; Sun Woo Kim; Jeong Kyu Kim; Changhwan Choi; Jin Hong Park; Rino Choi; Hyun Yong Yu

doi:10.1109/LED.2016.2524470

Non-alloyed ohmic contacts on GaAs using metal-interlayer-semiconductor structure with SF6 plasma treatment

Seung Hwan Kim, Gwang Sik Kim, Sun Woo Kim, Jeong Kyu Kim, Changhwan Choi, Jin Hong Park, Rino Choi, Hyun Yong Yu

School of Electrical Engineering

Research output: Contribution to journal › Article › peer-review

12 Citations (Scopus)

Abstract

We demonstrate the effect of SF6 plasma passivation with a ZnO interlayer in a metal-interlayersemiconductor (MIS) structure to reduce source/drain (S/D) contact resistance. The interface trap states and the metalinduced gap states causing the Fermi-level pinning problem are effectively alleviated by passivating the GaAs surface with SF6 plasma treatment and inserting a thin ZnO interlayer, respectively. Specific contact resistivity exhibits ∼10⁴× reduction when the GaAs surface is treated with SF6 plasma, followed by ZnO interlayer deposition, compared with the Ti/n-GaAs (∼2×10¹⁸ cm^-3) S/D contact. This result proposes the promising non-alloyed S/D ohmic contact for III-V semiconductor-based transistors.

Original language	English
Article number	2524470
Pages (from-to)	373-376
Number of pages	4
Journal	IEEE Electron Device Letters
Volume	37
Issue number	4
DOIs	https://doi.org/10.1109/LED.2016.2524470
Publication status	Published - 2016 Apr

Keywords

Contact resistance
Fermi-level unpinning
Gallium arsenide
Passivation
SF6 plasma

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

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10.1109/LED.2016.2524470

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title = "Non-alloyed ohmic contacts on GaAs using metal-interlayer-semiconductor structure with SF6 plasma treatment",

abstract = "We demonstrate the effect of SF6 plasma passivation with a ZnO interlayer in a metal-interlayersemiconductor (MIS) structure to reduce source/drain (S/D) contact resistance. The interface trap states and the metalinduced gap states causing the Fermi-level pinning problem are effectively alleviated by passivating the GaAs surface with SF6 plasma treatment and inserting a thin ZnO interlayer, respectively. Specific contact resistivity exhibits ∼104× reduction when the GaAs surface is treated with SF6 plasma, followed by ZnO interlayer deposition, compared with the Ti/n-GaAs (∼2×1018 cm-3) S/D contact. This result proposes the promising non-alloyed S/D ohmic contact for III-V semiconductor-based transistors.",

keywords = "Contact resistance, Fermi-level unpinning, Gallium arsenide, Passivation, SF6 plasma",

author = "Kim, {Seung Hwan} and Kim, {Gwang Sik} and Kim, {Sun Woo} and Kim, {Jeong Kyu} and Changhwan Choi and Park, {Jin Hong} and Rino Choi and Yu, {Hyun Yong}",

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year = "2016",

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doi = "10.1109/LED.2016.2524470",

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AU - Kim, Seung Hwan

AU - Kim, Gwang Sik

AU - Kim, Sun Woo

AU - Kim, Jeong Kyu

AU - Choi, Changhwan

AU - Park, Jin Hong

AU - Choi, Rino

AU - Yu, Hyun Yong

PY - 2016/4

Y1 - 2016/4

N2 - We demonstrate the effect of SF6 plasma passivation with a ZnO interlayer in a metal-interlayersemiconductor (MIS) structure to reduce source/drain (S/D) contact resistance. The interface trap states and the metalinduced gap states causing the Fermi-level pinning problem are effectively alleviated by passivating the GaAs surface with SF6 plasma treatment and inserting a thin ZnO interlayer, respectively. Specific contact resistivity exhibits ∼104× reduction when the GaAs surface is treated with SF6 plasma, followed by ZnO interlayer deposition, compared with the Ti/n-GaAs (∼2×1018 cm-3) S/D contact. This result proposes the promising non-alloyed S/D ohmic contact for III-V semiconductor-based transistors.

AB - We demonstrate the effect of SF6 plasma passivation with a ZnO interlayer in a metal-interlayersemiconductor (MIS) structure to reduce source/drain (S/D) contact resistance. The interface trap states and the metalinduced gap states causing the Fermi-level pinning problem are effectively alleviated by passivating the GaAs surface with SF6 plasma treatment and inserting a thin ZnO interlayer, respectively. Specific contact resistivity exhibits ∼104× reduction when the GaAs surface is treated with SF6 plasma, followed by ZnO interlayer deposition, compared with the Ti/n-GaAs (∼2×1018 cm-3) S/D contact. This result proposes the promising non-alloyed S/D ohmic contact for III-V semiconductor-based transistors.

KW - Contact resistance

KW - Fermi-level unpinning

KW - Gallium arsenide

KW - Passivation

KW - SF6 plasma

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Non-alloyed ohmic contacts on GaAs using metal-interlayer-semiconductor structure with SF6 plasma treatment

Abstract

Keywords

ASJC Scopus subject areas

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