Nonvolatile and Neuromorphic Memory Devices Using Interfacial Traps in Two-Dimensional WSe2/MoTe2Stack Channel

Sam Park, Yeonsu Jeong, Hye Jin Jin, Junkyu Park, Hyenam Jang, Sol Lee, Woong Huh, Hyunmin Cho, Hyung Gon Shin, Kwanpyo Kim, Chul Ho Lee, Shinhyun Choi, Seongil Im

Research output: Contribution to journalArticlepeer-review

4 Citations (Scopus)

Abstract

Very recently, stacked two-dimensional materials have been studied, focusing on the van der Waals interaction at their stack junction interface. Here, we report field effect transistors (FETs) with stacked transition metal dichalcogenide (TMD) channels, where the heterojunction interface between two TMDs appears useful for nonvolatile or neuromorphic memory FETs. A few nanometer-thin WSe2 and MoTe2 flakes are vertically stacked on the gate dielectric, and bottom p-MoTe2 performs as a channel for hole transport. Interestingly, the WSe2/MoTe2 stack interface functions as a hole trapping site where traps behave in a nonvolatile manner, although trapping/detrapping can be controlled by gate voltage (VGS). Memory retention after high VGS pulse appears longer than 10000 s, and the Program/Erase ratio in a drain current is higher than 200. Moreover, the traps are delicately controllable even with small VGS, which indicates that a neuromorphic memory is also possible with our heterojunction stack FETs. Our stack channel FET demonstrates neuromorphic memory behavior of ∼94% recognition accuracy.

Original languageEnglish
Pages (from-to)12064-12071
Number of pages8
JournalACS nano
Volume14
Issue number9
DOIs
Publication statusPublished - 2020 Sep 22

Keywords

  • WSe/MoTeheterojunction
  • interface traps
  • neuromorphic device
  • nonvolatile memory
  • stack channel FET

ASJC Scopus subject areas

  • Materials Science(all)
  • Engineering(all)
  • Physics and Astronomy(all)

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