OpenMP directive extension for BlackFin 561 dual core processor

Hee Seo, Seon Wook Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

Many researchers and vendors are exploiting the increasing number of transistors to build chip multiprocessors (CMPs) by partitioning a chip into multiple simple ILP cores. As in traditional multiprocessors, CMPs extract thread-level parallelism (TLP) from programs by running multiple independent program segments, i.e., threads, in parallel. Currently CMPs are used widely in high performance servers, and even in embedded systems. In this paper, we present an extension of the OpenMP shared directive for performance optimization on BlackFin 561 (ADSP-BF561) dual core processors. In order to support memory consistency between multiple cores, many architectures have been proposed. On the dual core processor, like ADSP-BF561, each core has its own private LI cache, and a shared L2 cache. In order to execute multithreaded parallel programs, we need to consider carefully where to allocate shared variables on targeted memory architecture. We could improve the speedup by up to 107% and reduce the energy consumption by up to 108% in our measured benchmarks with respect to no use of our extension.

Original languageEnglish
Title of host publicationProceedings - Sixth IEEE International Conference on Computer and Information Technology, CIT 2006
DOIs
Publication statusPublished - 2006 Dec 1
Event6th IEEE International Conference on Computer and Information Technology, CIT 2006 - Seoul, Korea, Republic of
Duration: 2006 Sep 202006 Sep 22

Other

Other6th IEEE International Conference on Computer and Information Technology, CIT 2006
CountryKorea, Republic of
CitySeoul
Period06/9/2006/9/22

Fingerprint

Inductive logic programming (ILP)
Memory architecture
Chip multiprocessors
OpenMP
Embedded systems
Transistors
Servers
Energy utilization
Data storage equipment
Thread
Cache
Many-core
Performance Optimization
Parallel Programs
Multiprocessor
Embedded Systems
Parallelism
Energy Consumption
Partitioning
Speedup

ASJC Scopus subject areas

  • Computer Science Applications
  • Information Systems
  • Software
  • Mathematics(all)

Cite this

Seo, H., & Kim, S. W. (2006). OpenMP directive extension for BlackFin 561 dual core processor. In Proceedings - Sixth IEEE International Conference on Computer and Information Technology, CIT 2006 [4019870] https://doi.org/10.1109/CIT.2006.131

OpenMP directive extension for BlackFin 561 dual core processor. / Seo, Hee; Kim, Seon Wook.

Proceedings - Sixth IEEE International Conference on Computer and Information Technology, CIT 2006. 2006. 4019870.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Seo, H & Kim, SW 2006, OpenMP directive extension for BlackFin 561 dual core processor. in Proceedings - Sixth IEEE International Conference on Computer and Information Technology, CIT 2006., 4019870, 6th IEEE International Conference on Computer and Information Technology, CIT 2006, Seoul, Korea, Republic of, 06/9/20. https://doi.org/10.1109/CIT.2006.131
Seo H, Kim SW. OpenMP directive extension for BlackFin 561 dual core processor. In Proceedings - Sixth IEEE International Conference on Computer and Information Technology, CIT 2006. 2006. 4019870 https://doi.org/10.1109/CIT.2006.131
Seo, Hee ; Kim, Seon Wook. / OpenMP directive extension for BlackFin 561 dual core processor. Proceedings - Sixth IEEE International Conference on Computer and Information Technology, CIT 2006. 2006.
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