Operation of single transistor type ferroelectric random access memory

S. I. Shim, S. I. Kim, Y. T. Kim, J. H. Park

Research output: Contribution to journalArticlepeer-review

2 Citations (Scopus)

Abstract

Verification was sought for the memory operation of a single transistor type ferroelectric random access memory (1T type FeRAM) with a circuit model for a memory cell transistor combined with a precharged capacitive decoupling sensing scheme. The wiring scheme of the IT type FeRAM array was also proposed based on the operation of the fabricated memory cell transistor. As a result, the memory operation of 1T type FeRAM was confirmed at a low current level with high sensing speed and no reference cell, and the design and verification of the full chip were achieved.

Original languageEnglish
Pages (from-to)1397-1398
Number of pages2
JournalElectronics Letters
Volume40
Issue number22
DOIs
Publication statusPublished - 2004 Oct 28

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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