Optimization of germanium (Ge) n+/p and p+/n junction diodes and sub 380 °c Ge CMOS technology for monolithic three-dimensional integration

Jin Hong Park, Duygu Kuzum, Hyun Yong Yu, Krishna C. Saraswat

Research output: Contribution to journalArticlepeer-review

7 Citations (Scopus)


In this paper, we optimize and investigate Ge n+/p and p +/n junction diodes formed by Co metal-induced dopant activation technique at the activation temperature range between 300 °C and 420 °C in terms of on/ off-current ratio. Combining this low-temperature n +/p and p+/n junction formation technique with a low-temperature gate stack comprised of Al/Al2O3/GeO 2 by ozone oxidation technique, we demonstrate n- and p-channel Ge metal-oxide-semiconductor field-effect transistors (MOSFETs), respectively, at sub-360 °C and 380 °C. This low-temperature Ge MOSFET process can be utilized to integrate Ge complementary metal-oxide-semiconductor devices above interconnect layers for monolithic 3-D integrated circuits.

Original languageEnglish
Article number5770202
Pages (from-to)2394-2400
Number of pages7
JournalIEEE Transactions on Electron Devices
Issue number8
Publication statusPublished - 2011 Aug
Externally publishedYes


  • Germanium (Ge) junction diode
  • metal-induced crystallization (MIC)
  • metal-induced dopants activation (MIDA)
  • monolithic 3-D integrated circuit (3-D-IC)

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering


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